[PATCH] D129557: [AMDGPU] Improve liveness copying in si-optimize-exec-masking-pre-ra

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp:192
+  if (llvm::any_of(SelLI->vnis(),
+                    [&](const VNInfo *VNI) {
+                      return VNI->isPHIDef();
----------------
Don't need the &


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Comment at: llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-alloc-failure.mir:1
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -mattr=+wavefrontsize32,-wavefrontsize64 -start-before=machine-scheduler -stop-after=greedy -o - %s | FileCheck %s
+
----------------
Don't need -mattr. Also I would prefer specifying the specific greedy run, and run to the end of virtregrewriter


================
Comment at: llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-alloc-failure.mir:12
+tracksRegLiveness: true
+registers:
+  - { id: 0, class: sreg_64, preferred-register: '' }
----------------
Can drop register section (and then compact the numbers with -run-pass=none)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129557/new/

https://reviews.llvm.org/D129557