[PATCH] D129641: [DAG] PromoteIntRes_BUILD_VECTOR - extend constant boolean vectors according to target BooleanContents

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 13 07:13:03 PDT 2022


RKSimon created this revision.
RKSimon added reviewers: craig.topper, dmgreen, efriedma, spatel, deadalnix, nemanjai.
Herald added subscribers: jsji, StephenFan, pengfei, hiraditya.
Herald added a project: All.
RKSimon requested review of this revision.
Herald added a project: LLVM.

PromoteIntRes_BUILD_VECTOR currently always ANY_EXTENDs build vector operands, but if this is a constant boolean vector we're losing the useful ability to keep the vector matching the BooleanContents mode used by the target.

This patch extends constant boolean vectors according to target BooleanContents, allowing a number of additional all-bits folds (notable XOR -> NOT conversions) to occur.

I looked at this as I'm still fighting the vselect-constants.ll regressions from D129150 <https://reviews.llvm.org/D129150> / D127115 <https://reviews.llvm.org/D127115> - although it doesn't look like it, this is 'kind of' an improvement where the codegen isn't relying on reusing the [1,0,0,0] vector in multiple locations any longer. The next step will be to make it realise that the sign-extend-in-reg (psllw/psraw pair) is superfluous for the demanded elts - its proving a particularly annoying yak shave where every individual patch increases codegen :-(


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129641

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/test/CodeGen/AArch64/arm64-vshuffle.ll
  llvm/test/CodeGen/ARM/select_xform.ll
  llvm/test/CodeGen/PowerPC/pr25080.ll
  llvm/test/CodeGen/PowerPC/vec-select.ll
  llvm/test/CodeGen/X86/bitcast-setcc-128.ll
  llvm/test/CodeGen/X86/promote-cmp.ll
  llvm/test/CodeGen/X86/vselect-constants.ll

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