[llvm] 2edb32a - [Test] Fix bailout blocks
Max Kazantsev via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 13 03:03:12 PDT 2022
Author: Max Kazantsev
Date: 2022-07-13T17:03:06+07:00
New Revision: 2edb32a0357fc92419730d1cf711aa5282104f22
URL: https://github.com/llvm/llvm-project/commit/2edb32a0357fc92419730d1cf711aa5282104f22
DIFF: https://github.com/llvm/llvm-project/commit/2edb32a0357fc92419730d1cf711aa5282104f22.diff
LOG: [Test] Fix bailout blocks
Added:
Modified:
llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll b/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
index d6ea253f2a674..6eb9ca0081722 100644
--- a/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
+++ b/llvm/test/Transforms/IndVarSimplify/cycled_phis.ll
@@ -19,7 +19,7 @@ define i32 @trivial.case(i32* %len.ptr) {
; CHECK-NEXT: [[SIGNED_CMP:%.*]] = icmp ult i32 [[IV]], [[LEN]]
; CHECK-NEXT: br i1 [[SIGNED_CMP]], label [[SIGNED_PASSED:%.*]], label [[FAILED_SIGNED:%.*]]
; CHECK: signed.passed:
-; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAILED_SIGNED]]
+; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAILED_UNSIGNED:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond()
@@ -31,8 +31,8 @@ define i32 @trivial.case(i32* %len.ptr) {
; CHECK-NEXT: call void @fail(i32 2)
; CHECK-NEXT: unreachable
; CHECK: done:
-; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
-; CHECK-NEXT: ret i32 [[IV_LCSSA1]]
+; CHECK-NEXT: [[IV_LCSSA2:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
%len = load i32, i32* %len.ptr, !range !0
@@ -48,7 +48,7 @@ loop:
signed.passed:
%unsigned.cmp = icmp ult i32 %iv, %len
- br i1 %unsigned.cmp, label %backedge, label %failed.signed
+ br i1 %unsigned.cmp, label %backedge, label %failed.unsigned
backedge:
%iv.next = add i32 %iv, 1
@@ -94,7 +94,7 @@ define i32 @start.from.sibling.iv(i32* %len.ptr, i32* %sibling.len.ptr) {
; CHECK-NEXT: br i1 [[SIGNED_CMP]], label [[SIGNED_PASSED:%.*]], label [[FAILED_SIGNED:%.*]]
; CHECK: signed.passed:
; CHECK-NEXT: [[UNSIGNED_CMP:%.*]] = icmp ult i32 [[IV]], [[LEN]]
-; CHECK-NEXT: br i1 [[UNSIGNED_CMP]], label [[BACKEDGE]], label [[FAILED_SIGNED]]
+; CHECK-NEXT: br i1 [[UNSIGNED_CMP]], label [[BACKEDGE]], label [[FAILED_UNSIGNED:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond()
@@ -109,8 +109,8 @@ define i32 @start.from.sibling.iv(i32* %len.ptr, i32* %sibling.len.ptr) {
; CHECK-NEXT: call void @fail(i32 3)
; CHECK-NEXT: unreachable
; CHECK: done:
-; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
-; CHECK-NEXT: ret i32 [[IV_LCSSA1]]
+; CHECK-NEXT: [[IV_LCSSA2:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
%len = load i32, i32* %len.ptr, !range !0
@@ -137,7 +137,7 @@ loop:
signed.passed:
%unsigned.cmp = icmp ult i32 %iv, %len
- br i1 %unsigned.cmp, label %backedge, label %failed.signed
+ br i1 %unsigned.cmp, label %backedge, label %failed.unsigned
backedge:
%iv.next = add i32 %iv, 1
@@ -185,7 +185,7 @@ define i32 @start.from.sibling.iv.wide(i32* %len.ptr, i32* %sibling.len.ptr) {
; CHECK-NEXT: [[SIGNED_CMP:%.*]] = icmp ult i32 [[IV]], [[LEN]]
; CHECK-NEXT: br i1 [[SIGNED_CMP]], label [[SIGNED_PASSED:%.*]], label [[FAILED_SIGNED:%.*]]
; CHECK: signed.passed:
-; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAILED_SIGNED]]
+; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[FAILED_UNSIGNED:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond()
@@ -200,8 +200,8 @@ define i32 @start.from.sibling.iv.wide(i32* %len.ptr, i32* %sibling.len.ptr) {
; CHECK-NEXT: call void @fail(i32 3)
; CHECK-NEXT: unreachable
; CHECK: done:
-; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
-; CHECK-NEXT: ret i32 [[IV_LCSSA1]]
+; CHECK-NEXT: [[IV_LCSSA2:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA2]]
;
entry:
%len = load i32, i32* %len.ptr, !range !0
@@ -230,7 +230,7 @@ loop:
signed.passed:
%unsigned.cmp = icmp ult i32 %iv, %len
- br i1 %unsigned.cmp, label %backedge, label %failed.signed
+ br i1 %unsigned.cmp, label %backedge, label %failed.unsigned
backedge:
%iv.next = add i32 %iv, 1
@@ -285,14 +285,14 @@ define i32 @start.from.sibling.iv.wide.cycled.phis(i32* %len.ptr, i32* %sibling.
; CHECK-NEXT: br i1 [[SIGNED_CMP]], label [[SIGNED_PASSED:%.*]], label [[FAILED_SIGNED:%.*]]
; CHECK: signed.passed:
; CHECK-NEXT: [[UNSIGNED_CMP:%.*]] = icmp ult i32 [[IV]], [[LEN]]
-; CHECK-NEXT: br i1 [[UNSIGNED_CMP]], label [[BACKEDGE]], label [[FAILED_SIGNED]]
+; CHECK-NEXT: br i1 [[UNSIGNED_CMP]], label [[BACKEDGE]], label [[FAILED_UNSIGNED:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[OUTER_LOOP_BACKEDGE]]
; CHECK: outer.loop.backedge:
; CHECK-NEXT: [[IV_NEXT_LCSSA]] = phi i32 [ [[IV_NEXT]], [[BACKEDGE]] ]
-; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
+; CHECK-NEXT: [[IV_LCSSA2:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
; CHECK-NEXT: [[OUTER_COND:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[OUTER_COND]], label [[OUTER_LOOP]], label [[DONE:%.*]]
; CHECK: failed.signed:
@@ -305,8 +305,8 @@ define i32 @start.from.sibling.iv.wide.cycled.phis(i32* %len.ptr, i32* %sibling.
; CHECK-NEXT: call void @fail(i32 3)
; CHECK-NEXT: unreachable
; CHECK: done:
-; CHECK-NEXT: [[IV_LCSSA1_LCSSA:%.*]] = phi i32 [ [[IV_LCSSA1]], [[OUTER_LOOP_BACKEDGE]] ]
-; CHECK-NEXT: ret i32 [[IV_LCSSA1_LCSSA]]
+; CHECK-NEXT: [[IV_LCSSA2_LCSSA:%.*]] = phi i32 [ [[IV_LCSSA2]], [[OUTER_LOOP_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA2_LCSSA]]
;
entry:
%len = load i32, i32* %len.ptr, !range !0
@@ -342,7 +342,7 @@ loop:
signed.passed:
%unsigned.cmp = icmp ult i32 %iv, %len
- br i1 %unsigned.cmp, label %backedge, label %failed.signed
+ br i1 %unsigned.cmp, label %backedge, label %failed.unsigned
backedge:
%iv.next = add i32 %iv, 1
@@ -403,14 +403,14 @@ define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(i32* %len.ptr, i
; CHECK-NEXT: br i1 [[SIGNED_CMP]], label [[SIGNED_PASSED:%.*]], label [[FAILED_SIGNED:%.*]]
; CHECK: signed.passed:
; CHECK-NEXT: [[UNSIGNED_CMP:%.*]] = icmp ult i32 [[IV]], [[LEN]]
-; CHECK-NEXT: br i1 [[UNSIGNED_CMP]], label [[BACKEDGE]], label [[FAILED_SIGNED]]
+; CHECK-NEXT: br i1 [[UNSIGNED_CMP]], label [[BACKEDGE]], label [[FAILED_UNSIGNED:%.*]]
; CHECK: backedge:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[COND:%.*]] = call i1 @cond()
; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[OUTER_LOOP_SELECTION:%.*]]
; CHECK: outer.loop.selection:
; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i32 [ [[IV_NEXT]], [[BACKEDGE]] ]
-; CHECK-NEXT: [[IV_LCSSA1:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
+; CHECK-NEXT: [[IV_LCSSA2:%.*]] = phi i32 [ [[IV]], [[BACKEDGE]] ]
; CHECK-NEXT: [[SWITCH_COND:%.*]] = call i32 @switch.cond()
; CHECK-NEXT: switch i32 [[SWITCH_COND]], label [[TAKE_SAME:%.*]] [
; CHECK-NEXT: i32 1, label [[TAKE_INCREMENT:%.*]]
@@ -437,8 +437,8 @@ define i32 @start.from.sibling.iv.wide.cycled.phis.complex.phis(i32* %len.ptr, i
; CHECK-NEXT: call void @fail(i32 3)
; CHECK-NEXT: unreachable
; CHECK: done:
-; CHECK-NEXT: [[IV_LCSSA1_LCSSA:%.*]] = phi i32 [ [[IV_LCSSA1]], [[OUTER_LOOP_BACKEDGE]] ]
-; CHECK-NEXT: ret i32 [[IV_LCSSA1_LCSSA]]
+; CHECK-NEXT: [[IV_LCSSA2_LCSSA:%.*]] = phi i32 [ [[IV_LCSSA2]], [[OUTER_LOOP_BACKEDGE]] ]
+; CHECK-NEXT: ret i32 [[IV_LCSSA2_LCSSA]]
;
entry:
%len = load i32, i32* %len.ptr, !range !0
@@ -474,7 +474,7 @@ loop:
signed.passed:
%unsigned.cmp = icmp ult i32 %iv, %len
- br i1 %unsigned.cmp, label %backedge, label %failed.signed
+ br i1 %unsigned.cmp, label %backedge, label %failed.unsigned
backedge:
%iv.next = add i32 %iv, 1
More information about the llvm-commits
mailing list