[PATCH] D129615: [MachineCombiner] Don't compute the latency of transient instructions

[Guozhi Wei via Phabricator via llvm-commits]

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If an MI will not generate a target instruction, we should not compute its latency. Then we can compute more precise instruction sequence cost, and get better result.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129615

Files:
  llvm/lib/CodeGen/MachineCombiner.cpp
  llvm/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
  llvm/test/CodeGen/AArch64/machine-combiner-transient.ll
  llvm/test/CodeGen/AArch64/neon-mla-mls.ll
  llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
  llvm/test/CodeGen/X86/machine-combiner-int.ll

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