[PATCH] D129558: [PPC32] fix stack size allocated for float point argument
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 12 04:50:31 PDT 2022
shchenz created this revision.
shchenz added reviewers: nemanjai, jhibbits, kernigh, PowerPC.
Herald added subscribers: kbarton, hiraditya.
Herald added a project: All.
shchenz requested review of this revision.
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This is for https://github.com/llvm/llvm-project/issues/56469
For now, we allocate 8 bytes for float type arguments on PPC32. Actually we should use 4 for PPC32. Even though float point value will be converted to double precision when loading and storing, but in the memory, it is still 4 bytes.
I can observe same behavior for PPC32 AIX. Only 4 bytes allocated for float type.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D129558
Files:
llvm/lib/Target/PowerPC/PPCCallingConv.td
llvm/test/CodeGen/PowerPC/fminnum.ll
llvm/test/CodeGen/PowerPC/pr56469.ll
Index: llvm/test/CodeGen/PowerPC/pr56469.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/pr56469.ll
+++ llvm/test/CodeGen/PowerPC/pr56469.ll
@@ -11,11 +11,11 @@
; CHECK-NEXT: stwu 1, -16(1)
; CHECK-NEXT: lfs 1, 24(1)
; CHECK-NEXT: lis 3, .L.str at ha
-; CHECK-NEXT: lfs 2, 32(1)
+; CHECK-NEXT: lfs 2, 28(1)
; CHECK-NEXT: la 3, .L.str at l(3)
-; CHECK-NEXT: lfs 3, 40(1)
+; CHECK-NEXT: lfs 3, 32(1)
; CHECK-NEXT: creqv 6, 6, 6
-; CHECK-NEXT: lfs 4, 48(1)
+; CHECK-NEXT: lfs 4, 36(1)
; CHECK-NEXT: bl printf
; CHECK-NEXT: lwz 0, 20(1)
; CHECK-NEXT: addi 1, 1, 16
Index: llvm/test/CodeGen/PowerPC/fminnum.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/fminnum.ll
+++ llvm/test/CodeGen/PowerPC/fminnum.ll
@@ -328,13 +328,13 @@
; CHECK-NEXT: fmr 30, 7
; CHECK-NEXT: stfd 31, 120(1) # 8-byte Folded Spill
; CHECK-NEXT: fmr 31, 8
-; CHECK-NEXT: lfs 24, 192(1)
-; CHECK-NEXT: lfs 23, 184(1)
-; CHECK-NEXT: lfs 22, 176(1)
-; CHECK-NEXT: lfs 21, 168(1)
-; CHECK-NEXT: lfs 20, 160(1)
-; CHECK-NEXT: lfs 19, 152(1)
-; CHECK-NEXT: lfs 18, 144(1)
+; CHECK-NEXT: lfs 24, 164(1)
+; CHECK-NEXT: lfs 23, 160(1)
+; CHECK-NEXT: lfs 22, 156(1)
+; CHECK-NEXT: lfs 21, 152(1)
+; CHECK-NEXT: lfs 20, 148(1)
+; CHECK-NEXT: lfs 19, 144(1)
+; CHECK-NEXT: lfs 18, 140(1)
; CHECK-NEXT: bl fminf
; CHECK-NEXT: fmr 17, 1
; CHECK-NEXT: fmr 1, 25
Index: llvm/lib/Target/PowerPC/PPCCallingConv.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCCallingConv.td
+++ llvm/lib/Target/PowerPC/PPCCallingConv.td
@@ -206,13 +206,8 @@
CCIfType<[i32], CCAssignToStack<4, 4>>,
- // Floats are stored in double precision format, thus they have the same
- // alignment and size as doubles.
- // With SPE floats are stored as single precision, so have alignment and
- // size of int.
- CCIfType<[f32,f64], CCIfNotSubtarget<"hasSPE()", CCAssignToStack<8, 8>>>,
- CCIfType<[f32], CCIfSubtarget<"hasSPE()", CCAssignToStack<4, 4>>>,
- CCIfType<[f64], CCIfSubtarget<"hasSPE()", CCAssignToStack<8, 8>>>,
+ CCIfType<[f32], CCAssignToStack<4, 4>>,
+ CCIfType<[f64], CCAssignToStack<8, 8>>,
// Vectors and float128 get 16-byte stack slots that are 16-byte aligned.
CCIfType<[v16i8, v8i16, v4i32, v4f32, v2f64, v2i64], CCAssignToStack<16, 16>>,
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