[llvm] f3dc94b - [AMDGPU] Add testing for removal of null export target in GFX11
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 11 08:08:59 PDT 2022
Author: Jay Foad
Date: 2022-07-11T15:56:01+01:00
New Revision: f3dc94bf61eb837d3170f76c93c3f7f60c7ce9d5
URL: https://github.com/llvm/llvm-project/commit/f3dc94bf61eb837d3170f76c93c3f7f60c7ce9d5
DIFF: https://github.com/llvm/llvm-project/commit/f3dc94bf61eb837d3170f76c93c3f7f60c7ce9d5.diff
LOG: [AMDGPU] Add testing for removal of null export target in GFX11
Code changes were submitted in D128185.
Added:
Modified:
llvm/test/CodeGen/AMDGPU/early-term.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/early-term.mir b/llvm/test/CodeGen/AMDGPU/early-term.mir
index 60dd1289f1066..42814944bde26 100644
--- a/llvm/test/CodeGen/AMDGPU/early-term.mir
+++ b/llvm/test/CodeGen/AMDGPU/early-term.mir
@@ -1,5 +1,6 @@
# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=si-late-branch-lowering -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX9 %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass=si-late-branch-lowering -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX10 %s
+# RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=-wavefrontsize32,+wavefrontsize64 -run-pass=si-late-branch-lowering -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX11 %s
--- |
define amdgpu_ps void @early_term_scc0_end_block() {
@@ -54,7 +55,9 @@ body: |
; GCN: S_ENDPGM 0
; GCN: bb.2:
; GCN: $exec = S_MOV_B64 0
- ; GCN: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX9: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX11: EXP_DONE 0, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
; GCN: S_ENDPGM 0
bb.0:
liveins: $sgpr0, $sgpr1
@@ -94,7 +97,9 @@ body: |
; GCN: S_ENDPGM 0
; GCN: bb.3:
; GCN: $exec = S_MOV_B64 0
- ; GCN: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX9: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX11: EXP_DONE 0, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
; GCN: S_ENDPGM 0
bb.0:
liveins: $sgpr0, $sgpr1
@@ -141,7 +146,9 @@ body: |
; GCN: S_ENDPGM 0
; GCN: bb.2:
; GCN: $exec = S_MOV_B64 0
- ; GCN: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX9: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX10: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
+ ; GFX11: EXP_DONE 0, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
; GCN: S_ENDPGM 0
bb.0:
liveins: $sgpr0, $sgpr1
@@ -246,6 +253,7 @@ body: |
; GCN: $exec = S_MOV_B64 0
; GFX9: EXP_DONE 9, undef $vgpr0, undef $vgpr0, undef $vgpr0, undef $vgpr0, 1, 0, 0, implicit $exec
; GFX10-NOT: EXP_DONE
+ ; GFX11-NOT: EXP_DONE
; GCN: S_ENDPGM 0
bb.0:
liveins: $sgpr0, $sgpr1
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