[PATCH] D129361: [MVE] Don't distribute add of vecreduce if it has more than one use

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 11 04:27:40 PDT 2022


dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Oh yeah, this certainly wasn't meant to introduce more nodes. LGTM, thanks.



================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:13353
         IsVecReduce(N1.getOperand(0)) && IsVecReduce(N1.getOperand(1)) &&
-        !isa<ConstantSDNode>(N0)) {
+        !isa<ConstantSDNode>(N0) && N1.getNode()->hasOneUse()) {
       SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0, N1.getOperand(0));
----------------
`N1->hasOneUse()` will do the same as getting the node.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129361/new/

https://reviews.llvm.org/D129361



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