[llvm] 4334cbd - [AArch64] Remove incorrect use of DemandElts

[David Green via llvm-commits]

Author: David Green
Date: 2022-07-08T11:38:00+01:00
New Revision: 4334cbd49b69ea036e7c9551c6177cd29b02c312

URL: https://github.com/llvm/llvm-project/commit/4334cbd49b69ea036e7c9551c6177cd29b02c312
DIFF: https://github.com/llvm/llvm-project/commit/4334cbd49b69ea036e7c9551c6177cd29b02c312.diff

LOG: [AArch64] Remove incorrect use of DemandElts

This call to computeKnownBits was passing in a 0xff mask, looking like
it was expecting it to be used as a DemandBits, not a DemandElts mask.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index ff030569eb3c..8108b77978e5 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6442,9 +6442,8 @@ static bool checkZExtBool(SDValue Arg, const SelectionDAG &DAG) {
   if (SizeInBits < 8)
     return false;
 
-  APInt LowBits(SizeInBits, 0xFF);
   APInt RequredZero(SizeInBits, 0xFE);
-  KnownBits Bits = DAG.computeKnownBits(Arg, LowBits, 4);
+  KnownBits Bits = DAG.computeKnownBits(Arg, 4);
   bool ZExtBool = (Bits.Zero & RequredZero) == RequredZero;
   return ZExtBool;
 }