[PATCH] D129295: [AMDGPU] Add GFX11 test coverage

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 7 08:25:12 PDT 2022


foad created this revision.
foad added reviewers: AMDGPU, Joe_Nash, rampitec, Petar.Avramovic.
Herald added subscribers: kosarev, mstorsjo, jdoerfert, kerbowa, asbirlea, arphaman, t-tye, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
Herald added a project: All.
foad requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

Add GFX11 test coverage to a bunch of tests where it was easy to do so,
mostly because the checks are autogenerated and/or GFX11 can share the
same checks as GFX10.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129295

Files:
  llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-local.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-region.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fadd.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmin.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.gws.sema.v.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.icmp.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/roundeven.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
  llvm/test/CodeGen/AMDGPU/add3.ll
  llvm/test/CodeGen/AMDGPU/add_shl.ll
  llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
  llvm/test/CodeGen/AMDGPU/and_or.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
  llvm/test/CodeGen/AMDGPU/carryout-selection.ll
  llvm/test/CodeGen/AMDGPU/cc-update.ll
  llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
  llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
  llvm/test/CodeGen/AMDGPU/ctlz.ll
  llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
  llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
  llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
  llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
  llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
  llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
  llvm/test/CodeGen/AMDGPU/fneg-fold-legalize-dag-increase-insts.ll
  llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
  llvm/test/CodeGen/AMDGPU/fpow.ll
  llvm/test/CodeGen/AMDGPU/frem.ll
  llvm/test/CodeGen/AMDGPU/fshl.ll
  llvm/test/CodeGen/AMDGPU/fshr.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
  llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
  llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
  llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
  llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
  llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
  llvm/test/CodeGen/AMDGPU/idiv-licm.ll
  llvm/test/CodeGen/AMDGPU/imm16.ll
  llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmul.legacy.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setreg.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
  llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
  llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
  llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
  llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
  llvm/test/CodeGen/AMDGPU/load-local.128.ll
  llvm/test/CodeGen/AMDGPU/load-local.96.ll
  llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
  llvm/test/CodeGen/AMDGPU/mcp-overlap-after-propagation.mir
  llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
  llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
  llvm/test/CodeGen/AMDGPU/offset-split-global.ll
  llvm/test/CodeGen/AMDGPU/or3.ll
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
  llvm/test/CodeGen/AMDGPU/propagate-attributes-bitcast-function.ll
  llvm/test/CodeGen/AMDGPU/propagate-attributes-clone.ll
  llvm/test/CodeGen/AMDGPU/propagate-attributes-single-set.ll
  llvm/test/CodeGen/AMDGPU/ptrmask.ll
  llvm/test/CodeGen/AMDGPU/rel32.ll
  llvm/test/CodeGen/AMDGPU/saddo.ll
  llvm/test/CodeGen/AMDGPU/saddsat.ll
  llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
  llvm/test/CodeGen/AMDGPU/shl_add.ll
  llvm/test/CodeGen/AMDGPU/shl_or.ll
  llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
  llvm/test/CodeGen/AMDGPU/shrink-instructions-implicit-vcclo.mir
  llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
  llvm/test/CodeGen/AMDGPU/ssubsat.ll
  llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
  llvm/test/CodeGen/AMDGPU/store-local.128.ll
  llvm/test/CodeGen/AMDGPU/store-local.96.ll
  llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
  llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
  llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll
  llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll
  llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll
  llvm/test/CodeGen/AMDGPU/strict_fma.f32.ll
  llvm/test/CodeGen/AMDGPU/strict_fma.f64.ll
  llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
  llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll
  llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll
  llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
  llvm/test/CodeGen/AMDGPU/strict_fsub.f32.ll
  llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
  llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
  llvm/test/CodeGen/AMDGPU/sub_i1.ll
  llvm/test/CodeGen/AMDGPU/subvector-test.mir
  llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
  llvm/test/CodeGen/AMDGPU/usubsat.ll
  llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
  llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
  llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
  llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir
  llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
  llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
  llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
  llvm/test/CodeGen/AMDGPU/xor3.ll
  llvm/test/CodeGen/AMDGPU/xor_add.ll



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