[PATCH] D123362: [RISCV][test] Precommit test for D122791.

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 7 02:12:07 PDT 2022


jacquesguan marked 2 inline comments as done.
jacquesguan added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll:1355
 
+define <vscale x 8 x i64> @vand_xx_nxv8i64(i64 %a, i64 %b) {
+; RV32-LABEL: vand_xx_nxv8i64:
----------------
RKSimon wrote:
> you can probably remove the cfi noise by changing these to:
> ```
> define <vscale x 8 x i64> @vand_xx_nxv8i64(i64 %a, i64 %b) nounwind {
> ```
Done, thanks.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll:3
+; RUN: llc -mtriple=riscv32 -mattr=+v,+m -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
+; RUN: llc -mtriple=riscv64 -mattr=+v,+m -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
 
----------------
RKSimon wrote:
> Extra attributes or better to have extra RUN lines with/without +m?
Done, thanks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123362/new/

https://reviews.llvm.org/D123362



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