[PATCH] D129164: [AsmPrinter] Fix bit pattern for i1 vectors.

[Eli Friedman via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG696f53665dc5: [AsmPrinter] Fix bit pattern for i1 vectors. (authored by efriedma).

Changed prior to commit:
  https://reviews.llvm.org/D129164?vs=442404&id=442670#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D129164/new/

https://reviews.llvm.org/D129164

Files:
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/test/CodeGen/AArch64/vector-global-i1.ll


Index: llvm/test/CodeGen/AArch64/vector-global-i1.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/AArch64/vector-global-i1.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple aarch64 | FileCheck %s
+
+; CHECK: a:
+; CHECK-NEXT: .zero 1
+ at a = internal constant <4 x i1> <i1 false, i1 false, i1 false, i1 false>
+; CHECK: b:
+; CHECK-NEXT: .byte 5
+ at b = internal constant <4 x i1> <i1 true, i1 false, i1 true, i1 false>
+; CHECK: c:
+; CHECK-NEXT: .hword 1
+; CHECK-NEXT: .byte 0
+; CHECK-NEXT: .zero 1
+ at c = internal constant <24 x i1> <i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>
+
Index: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
===================================================================
--- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2995,17 +2995,42 @@
   }
 }
 
+static void emitGlobalConstantLargeInt(const ConstantInt *CI, AsmPrinter &AP);
+
 static void emitGlobalConstantVector(const DataLayout &DL,
                                      const ConstantVector *CV, AsmPrinter &AP,
                                      AsmPrinter::AliasMapTy *AliasList) {
-  for (unsigned I = 0, E = CV->getType()->getNumElements(); I != E; ++I) {
-    emitGlobalAliasInline(AP, DL.getTypeAllocSize(CV->getType()) * I, AliasList);
-    emitGlobalConstantImpl(DL, CV->getOperand(I), AP);
+  Type *ElementType = CV->getType()->getElementType();
+  uint64_t ElementSizeInBits = DL.getTypeSizeInBits(ElementType);
+  uint64_t ElementAllocSizeInBits = DL.getTypeAllocSizeInBits(ElementType);
+  uint64_t EmittedSize;
+  if (ElementSizeInBits != ElementAllocSizeInBits) {
+    // If the allocation size of an element is different from the size in bits,
+    // printing each element separately will insert incorrect padding.
+    //
+    // The general algorithm here is complicated; instead of writing it out
+    // here, just use the existing code in ConstantFolding.
+    Type *IntT =
+        IntegerType::get(CV->getContext(), DL.getTypeSizeInBits(CV->getType()));
+    ConstantInt *CI = dyn_cast_or_null<ConstantInt>(ConstantFoldConstant(
+        ConstantExpr::getBitCast(const_cast<ConstantVector *>(CV), IntT), DL));
+    if (!CI) {
+      report_fatal_error(
+          "Cannot lower vector global with unusual element type");
+    }
+    emitGlobalAliasInline(AP, 0, AliasList);
+    emitGlobalConstantLargeInt(CI, AP);
+    EmittedSize = DL.getTypeStoreSize(CV->getType());
+  } else {
+    for (unsigned I = 0, E = CV->getType()->getNumElements(); I != E; ++I) {
+      emitGlobalAliasInline(AP, DL.getTypeAllocSize(CV->getType()) * I, AliasList);
+      emitGlobalConstantImpl(DL, CV->getOperand(I), AP);
+    }
+    EmittedSize =
+        DL.getTypeAllocSize(ElementType) * CV->getType()->getNumElements();
   }
 
   unsigned Size = DL.getTypeAllocSize(CV->getType());
-  unsigned EmittedSize = DL.getTypeAllocSize(CV->getType()->getElementType()) *
-                         CV->getType()->getNumElements();
   if (unsigned Padding = Size - EmittedSize)
     AP.OutStreamer->emitZeros(Padding);
 }


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