[PATCH] D129221: [RISCV] Switch to using get.active.lane.mask when tail folding

[Philip Reames via Phabricator via llvm-commits]

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The motivation here is to a) bring us closer into alignment with AArch64 under the assumption that codepath is better tested, and b) simplify pattern matching in an upcoming change.

The immediate impact is a significant IR reduction - in particular, killing off a vector IV - but a fairly minimal change in the generated assembly.  Due to a difference in expansion behavior we get a saturating add vs an unsaturating one for the old code, but that's about it.  This difference comes down to different handling of overflow, which doesn't seem to be possible here anyways, so the assembly codegen is arguably a minor regression.  I don't expect that to matter in practice.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D129221

Files:
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
  llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
  llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll

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