[PATCH] D127041: [LLVM] Add the support for fmax and fmin in atomicrmw instruction

[Shilei Tian via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1023ddaf7790: [LLVM] Add the support for fmax and fmin in atomicrmw instruction (authored by tianshilei1992).

Changed prior to commit:
  https://reviews.llvm.org/D127041?vs=441227&id=442580#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127041/new/

https://reviews.llvm.org/D127041

Files:
  llvm/docs/GlobalISel/GenericOpcode.rst
  llvm/docs/LangRef.rst
  llvm/docs/ReleaseNotes.rst
  llvm/include/llvm-c/Core.h
  llvm/include/llvm/AsmParser/LLToken.h
  llvm/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/IR/Instructions.h
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/GenericOpcodes.td
  llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
  llvm/include/llvm/Target/TargetSelectionDAG.td
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/CodeGen/AtomicExpandPass.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
  llvm/lib/IR/Core.cpp
  llvm/lib/IR/Instructions.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
  llvm/lib/Transforms/Utils/LowerAtomic.cpp
  llvm/test/Assembler/atomic.ll
  llvm/test/Bitcode/compatibility.ll
  llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
  llvm/test/Transforms/InstCombine/atomicrmw.ll
  llvm/test/Transforms/LowerAtomic/atomic-load.ll

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