[llvm] 3ff319c - [PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2022-07-05T20:09:42+01:00
New Revision: 3ff319c69047c2863531538339baaf6481268da0

URL: https://github.com/llvm/llvm-project/commit/3ff319c69047c2863531538339baaf6481268da0
DIFF: https://github.com/llvm/llvm-project/commit/3ff319c69047c2863531538339baaf6481268da0.diff

LOG: [PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals

According to D127731, PPCTLSDynamicCall does not preserve
LiveIntervals, so stop claiming that it does and remove the code
that tried to repair them. NFCI.

Differential Revision: https://reviews.llvm.org/D128421

Added: 
    llvm/test/CodeGen/PowerPC/tls-crash.mir

Modified: 
    llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp b/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
index fbd487fbcfd5..59e8f3ff84a4 100644
--- a/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
@@ -43,7 +43,6 @@ namespace {
     }
 
     const PPCInstrInfo *TII;
-    LiveIntervals *LIS;
 
 protected:
     bool processBlock(MachineBasicBlock &MBB) {
@@ -83,11 +82,8 @@ namespace {
         Register InReg = PPC::NoRegister;
         Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
         Register GPR4 = Is64Bit ? PPC::X4 : PPC::R4;
-        SmallVector<Register, 3> OrigRegs = {OutReg, GPR3};
-        if (!IsPCREL) {
+        if (!IsPCREL)
           InReg = MI.getOperand(1).getReg();
-          OrigRegs.push_back(InReg);
-        }
         DebugLoc DL = MI.getDebugLoc();
 
         unsigned Opc1, Opc2;
@@ -139,11 +135,6 @@ namespace {
           BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0)
                                                               .addImm(0);
 
-        // The ADDItls* instruction is the first instruction in the
-        // repair range.
-        MachineBasicBlock::iterator First = I;
-        --First;
-
         if (IsAIX) {
           // The variable offset and region handle are copied in r4 and r3. The
           // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX.
@@ -177,16 +168,10 @@ namespace {
         BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg)
           .addReg(GPR3);
 
-        // The COPY is the last instruction in the repair range.
-        MachineBasicBlock::iterator Last = I;
-        --Last;
-
         // Move past the original instruction and remove it.
         ++I;
         MI.removeFromParent();
 
-        // Repair the live intervals.
-        LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs);
         Changed = true;
       }
 
@@ -204,7 +189,6 @@ namespace {
 
     bool runOnMachineFunction(MachineFunction &MF) override {
       TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo();
-      LIS = &getAnalysis<LiveIntervals>();
 
       bool Changed = false;
 
@@ -217,9 +201,7 @@ namespace {
 
     void getAnalysisUsage(AnalysisUsage &AU) const override {
       AU.addRequired<LiveIntervals>();
-      AU.addPreserved<LiveIntervals>();
       AU.addRequired<SlotIndexes>();
-      AU.addPreserved<SlotIndexes>();
       MachineFunctionPass::getAnalysisUsage(AU);
     }
   };

diff  --git a/llvm/test/CodeGen/PowerPC/tls-crash.mir b/llvm/test/CodeGen/PowerPC/tls-crash.mir
new file mode 100644
index 000000000000..186ba6da325a
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/tls-crash.mir
@@ -0,0 +1,25 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 -relocation-model=pic -run-pass=ppc-tls-dynamic-call,pipeliner -verify-machineinstrs %s -o - | FileCheck %s
+
+# Just check that MachineVerifier does not fail due to PPCTLSDynamicCall failing
+# to preserve some analyses.
+# CHECK: name: test
+
+--- |
+  %0 = type { i32 (...)**, %0* }
+  @x = external dso_local thread_local unnamed_addr global %0*, align 8
+  define void @test(i8* %arg) { ret void }
+...
+---
+name: test
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $x3
+
+    %0:g8rc = COPY killed $x3
+    %1:g8rc_and_g8rc_nox0 = PADDI8pc 0, target-flags(ppc-pcrel, ppc-got, ppc-tlsld) @x
+    %2:g8rc_and_g8rc_nox0 = PADDIdtprel killed %1, target-flags(ppc-pcrel, ppc-got, ppc-tlsld) @x
+    STD killed %0, 0, killed %2 :: (store (s64) into `i8** bitcast (%0** @x to i8**)`)
+    BLR8 implicit $lr8, implicit $rm
+...