[PATCH] D129084: [AMDGPU] gfx11 Fix disassembler for VOP3 dpp8

[Joe Nash via Phabricator via llvm-commits]

Joe_Nash added a comment.

The problem with doing the work separately is that codegen will be affected by this patch as well. Currently, dot2_bf16_bf16_e64_dpp does not exist, so GCNDPPCombine will simply fail to generate that instruction. But after this patch we will generate it. Now this test I tried appears to code generate correctly, but the problem is we cannot assemble or disassemble the resulting instructions. So I would recommend the full asm/disasm implementation and including this codegen test too.

RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GCN
===================================================================================================

---

name: dot2_bf16_bf16
tracksRegLiveness: true
body:             |

  bb.0:
    liveins: $vgpr0, $vgpr1, $vgpr2
  
    %0:vgpr_32 = COPY $vgpr0
    %1:vgpr_32 = COPY $vgpr1
    %2:vgpr_32 = COPY $vgpr2
    %3:vgpr_32 = IMPLICIT_DEF
    %4:vgpr_32 = V_MOV_B32_dpp %3, %1, 1, 15, 15, 1, implicit $exec
    %5:vgpr_32 = V_DOT2_BF16_BF16_e64 8, %4, 4, %3, 4, %2, 0, implicit $exec
    S_ENDPGM 0, implicit %5

...

Yields
0xd6677000 0x040a00fa 0xff080101; v_dot2_bf16_bf16  v0.h, v1, v0, v2.h quad_perm:[1,0,0,0] bound_ctrl:1


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