[PATCH] D127530: [PowerPC] Extend GlobalISel implementation to emit and/or/xor.

[Kai Nacke via Phabricator via llvm-commits]

Kai marked 3 inline comments as done.
Kai added inline comments.


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Comment at: llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp:41
+    MIB.addUse(PhysReg, RegState::Implicit);
+    Register ExtReg = extendRegister(ValVReg, VA);
+    MIRBuilder.buildCopy(PhysReg, ExtReg);
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nemanjai wrote:
> Is it not possible to add tests at this time that actually extend the return value from `i32` (for both `sixgnext, zeroext`)?
It's not yet possible. `signext` requires a legal `G_SEXT` instruction.
`zeroext` either requires handling `G_CONSTANT` (to clear the upper bits), or a combiner (`redundant_and`) to remove the and instruction used to clear the bits.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127530/new/

https://reviews.llvm.org/D127530