[llvm] e7a0fa4 - [DAG] foldAddSubOfSignBit - don't bother creating the new shift node unless constant folding succeeds
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 5 08:44:50 PDT 2022
Author: Simon Pilgrim
Date: 2022-07-05T16:44:31+01:00
New Revision: e7a0fa4df00c6386632d1395799c6150f39a3e33
URL: https://github.com/llvm/llvm-project/commit/e7a0fa4df00c6386632d1395799c6150f39a3e33
DIFF: https://github.com/llvm/llvm-project/commit/e7a0fa4df00c6386632d1395799c6150f39a3e33.diff
LOG: [DAG] foldAddSubOfSignBit - don't bother creating the new shift node unless constant folding succeeds
Noticed by inspection - the new shift is only ever used if the constant fold occurs
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index ce570abef92e6..dbb81ab65ebbe 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2392,12 +2392,14 @@ static SDValue foldAddSubOfSignBit(SDNode *N, SelectionDAG &DAG) {
// add (srl (not X), 31), C --> add (sra X, 31), (C + 1)
// sub C, (srl (not X), 31) --> add (srl X, 31), (C - 1)
SDLoc DL(N);
- auto ShOpcode = IsAdd ? ISD::SRA : ISD::SRL;
- SDValue NewShift = DAG.getNode(ShOpcode, DL, VT, Not.getOperand(0), ShAmt);
- if (SDValue NewC =
- DAG.FoldConstantArithmetic(IsAdd ? ISD::ADD : ISD::SUB, DL, VT,
- {ConstantOp, DAG.getConstant(1, DL, VT)}))
+ if (SDValue NewC = DAG.FoldConstantArithmetic(
+ IsAdd ? ISD::ADD : ISD::SUB, DL, VT,
+ {ConstantOp, DAG.getConstant(1, DL, VT)})) {
+ SDValue NewShift = DAG.getNode(IsAdd ? ISD::SRA : ISD::SRL, DL, VT,
+ Not.getOperand(0), ShAmt);
return DAG.getNode(ISD::ADD, DL, VT, NewShift, NewC);
+ }
+
return SDValue();
}
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