[PATCH] D128820: [ConstExpr] Don't create div/rem expressions

[Nicolai Hähnle via Phabricator via llvm-commits]

nhaehnle accepted this revision.
nhaehnle added a comment.
This revision is now accepted and ready to land.

LGTM, one suggestion though.



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Comment at: llvm/lib/IR/Constants.cpp:2368-2379
+bool ConstantExpr::isDesirableBinOp(unsigned Opcode) {
+  assert(Instruction::isBinaryOp(Opcode) && "Argument must be binop opcode");
+  switch (Opcode) {
+  case Instruction::UDiv:
+  case Instruction::SDiv:
+  case Instruction::URem:
+  case Instruction::SRem:
----------------
Is the plan to successively make more ops undesirable? Perhaps this should be a whitelist instead of a blacklist.


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  https://reviews.llvm.org/D128820/new/

https://reviews.llvm.org/D128820