[PATCH] D129063: [RISCV][NFC] Merge the isolated decleration into foreach.
Jianjian Guan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 4 19:36:07 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG063500afc0b8: [RISCV][NFC] Merge the isolated decleration into foreach. (authored by jacquesguan).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129063/new/
https://reviews.llvm.org/D129063
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Index: llvm/lib/Target/RISCV/RISCVInstrInfoV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -1476,14 +1476,9 @@
let hasSideEffects = 0, mayLoad = 0, mayStore = 0,
RVVConstraint = NoConstraint in {
-def VMV1R_V : RVInstV<0b100111, 0, OPIVI, (outs VR:$vd), (ins VR:$vs2),
- "vmv1r.v", "$vd, $vs2">, VMVRSched<1> {
- let Uses = [];
- let vm = 1;
-}
// A future extension may relax the vector register alignment restrictions.
-foreach n = [2, 4, 8] in {
- defvar vrc = !cast<VReg>("VRM"#n);
+foreach n = [1, 2, 4, 8] in {
+ defvar vrc = !cast<VReg>(!if(!eq(n, 1), "VR", "VRM"#n));
def VMV#n#R_V : RVInstV<0b100111, !add(n, -1), OPIVI, (outs vrc:$vd),
(ins vrc:$vs2), "vmv" # n # "r.v", "$vd, $vs2">,
VMVRSched<n> {
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