[PATCH] D128901: [LoongArch] Add codegen support for atomic fence, atomic load and atomic store

[Gong LingQin via Phabricator via llvm-commits]

gonglingqin added inline comments.


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Comment at: llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp:116
+void LoongArchPassConfig::addIRPasses() {
+  addPass(createAtomicExpandPass());
+
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lkail wrote:
> You may need to add tests in `lvm/test/Transforms/AtomicExpand/LoongArch`.
Thanks for reminding me.I will add tests.


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Comment at: llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll:139
+; LA64-NEXT:    dbar 0
+; LA64-NEXT:    st.d $a0, $a1, 0
+; LA64-NEXT:    jirl $zero, $ra, 0
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xry111 wrote:
> GCC uses one instruction for this: `amswap_db.d $zero, $a1, $a0`, and to me it's correct.  Can we also use it?
> 
> Likewise for i32 store release operation.
Thank you for your reminder. This may be possible. Further, we can generate different instructions according to constraints (such as instructions without fences when unordered). I'm not sure whether this optimization should be implemented in this patch or another patch. Do you have any suggestions?


Repository:
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https://reviews.llvm.org/D128901