[PATCH] D128901: [LoongArch] Add codegen support for atomic fence, atomic load and atomic store

[Xi Ruoyao via Phabricator via llvm-commits]

xry111 added inline comments.


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Comment at: llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll:139
+; LA64-NEXT:    dbar 0
+; LA64-NEXT:    st.d $a0, $a1, 0
+; LA64-NEXT:    jirl $zero, $ra, 0
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GCC uses one instruction for this: `amswap_db.d $zero, $a1, $a0`, and to me it's correct.  Can we also use it?

Likewise for i32 store release operation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128901/new/

https://reviews.llvm.org/D128901