[PATCH] D128972: [RISCV][NFC] Simplify condition of IsTU.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 1 18:20:45 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8590a35ef900: [RISCV][NFC] Simplify condition of IsTU. (authored by fakepaper56).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128972/new/
https://reviews.llvm.org/D128972
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Index: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -1364,7 +1364,7 @@
unsigned CurOp = 2;
// Masked intrinsic only have TU version pseduo instructions.
- bool IsTU = IsMasked || (!IsMasked && !Node->getOperand(CurOp).isUndef());
+ bool IsTU = IsMasked || !Node->getOperand(CurOp).isUndef();
SmallVector<SDValue, 8> Operands;
if (IsTU)
Operands.push_back(Node->getOperand(CurOp++));
@@ -1416,9 +1416,8 @@
// The riscv_vlm intrinsic are always tail agnostic and no passthru operand.
bool HasPassthruOperand = IntNo != Intrinsic::riscv_vlm;
// Masked intrinsic only have TU version pseduo instructions.
- bool IsTU =
- HasPassthruOperand &&
- ((!IsMasked && !Node->getOperand(CurOp).isUndef()) || IsMasked);
+ bool IsTU = HasPassthruOperand &&
+ (IsMasked || !Node->getOperand(CurOp).isUndef());
SmallVector<SDValue, 8> Operands;
if (IsTU)
Operands.push_back(Node->getOperand(CurOp++));
@@ -1451,7 +1450,7 @@
unsigned CurOp = 2;
// Masked intrinsic only have TU version pseduo instructions.
- bool IsTU = IsMasked || (!IsMasked && !Node->getOperand(CurOp).isUndef());
+ bool IsTU = IsMasked || !Node->getOperand(CurOp).isUndef();
SmallVector<SDValue, 7> Operands;
if (IsTU)
Operands.push_back(Node->getOperand(CurOp++));
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