[llvm] 3d7aeb3 - [gn build] Manually port 43dc3190

[Arthur Eubanks via llvm-commits]

Author: Arthur Eubanks
Date: 2022-07-01T11:39:04-07:00
New Revision: 3d7aeb3c734efe4e2051ebd4c8e4c14e02c6100b

URL: https://github.com/llvm/llvm-project/commit/3d7aeb3c734efe4e2051ebd4c8e4c14e02c6100b
DIFF: https://github.com/llvm/llvm-project/commit/3d7aeb3c734efe4e2051ebd4c8e4c14e02c6100b.diff

LOG: [gn build] Manually port 43dc3190

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn

Removed: 
    


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diff  --git a/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn b/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn
index f12d39ad6e46..e46d5662c8fa 100644
--- a/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/include/llvm/IR/BUILD.gn
@@ -57,6 +57,16 @@ tablegen("IntrinsicsBPF") {
   td_file = "Intrinsics.td"
 }
 
+tablegen("IntrinsicsDirectX") {
+  visibility = [ ":public_tablegen" ]
+  output_name = "IntrinsicsDirectX.h"
+  args = [
+    "-gen-intrinsic-enums",
+    "-intrinsic-prefix=dxil",
+  ]
+  td_file = "Intrinsics.td"
+}
+
 tablegen("IntrinsicsHexagon") {
   visibility = [ ":public_tablegen" ]
   output_name = "IntrinsicsHexagon.h"
@@ -185,6 +195,7 @@ group("public_tablegen") {
     ":IntrinsicsAMDGPU",
     ":IntrinsicsARM",
     ":IntrinsicsBPF",
+    ":IntrinsicsDirectX",
     ":IntrinsicsHexagon",
     ":IntrinsicsMips",
     ":IntrinsicsNVPTX",