[PATCH] D128898: [LoongArch] Add codegen support for handling floating point immediates
WÁNG Xuěruì via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 1 10:38:51 PDT 2022
xen0n added inline comments.
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Comment at: llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td:206-207
+let Predicates = [HasBasicD, IsLA32] in {
+def : Pat<(f64 fpimm0), (FCVT_D_S (MOVGR2FR_W R0))>;
+def : Pat<(f64 fpimm0neg), (FCVT_D_S (FNEG_S (MOVGR2FR_W R0)))>;
+def : Pat<(f64 fpimm1), (FCVT_D_S (FFINT_S_W (MOVGR2FR_W (ADDI_W R0, 1))))>;
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Are we better off handling this by just hard-coding the bit patterns then `movgr2fr.w` and `movgr2frh.w`? I don't know the exact latencies for `fcvt.d.s` but plain moves should be a bit faster.
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Comment at: llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp:121
+ // FIXME: Only support PC-relative addressing to access the symbol.
+ // Target flags will added later.
+ if (!isPositionIndependent()) {
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nit: "will be added later"
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D128898/new/
https://reviews.llvm.org/D128898
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