[PATCH] D128665: [AArch64] Make nxv1i1 types a legal type for SVE.

Fri Jul 1 05:57:25 PDT 2022

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.

One potential nit but otherwise this and the other i1 work is looking really good.

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Comment at: llvm/lib/Target/AArch64/AArch64CallingConvention.td:87-88
            CCAssignToReg<[P0, P1, P2, P3]>>,
-  CCIfType<[nxv2i1, nxv4i1, nxv8i1, nxv16i1],
+  CCIfType<[nxv1i1, nxv2i1, nxv4i1, nxv8i1, nxv16i1],
            CCPassIndirect<i64>>,

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This is not relevant to this patch just observational.

For my own education do you know what this means? If I was to guess I'd say "we can pass such parameter types through memory"? If correct then I believe we only support nxv16i1 types when going throw memory.

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Comment at: llvm/lib/Target/AArch64/SVEInstrFormats.td:6205
   def : SVE_1_Op_Pat<nxv2i1, op, nxv4i1,  !cast<Instruction>(NAME)>;
+  def : SVE_1_Op_Pat<nxv1i1, op, nxv2i1,  !cast<Instruction>(NAME)>;
 }
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Do we still need this change?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128665/new/

https://reviews.llvm.org/D128665