[PATCH] D128964: Pre-merge testing

[caosong via Phabricator via llvm-commits]

IcebloomCao created this revision.
Herald added subscribers: jsji, pengfei, hiraditya.
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IcebloomCao requested review of this revision.
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I would like to try pre-merge testing


https://reviews.llvm.org/D128964

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -52,12 +52,12 @@
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCExpr.h"
 #include "llvm/MC/MCSymbol.h"
+#include "llvm/Target/TargetOptions.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/KnownBits.h"
 #include "llvm/Support/MathExtras.h"
-#include "llvm/Target/TargetOptions.h"
 #include <algorithm>
 #include <bitset>
 #include <cctype>
@@ -2606,15 +2606,15 @@
   Arg = DAG.getBitcast(MVT::i64, Arg);
 
   // Splitting the value into two i32 types
-  SDValue Lo, Hi;
-  Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg,
-                   DAG.getConstant(0, Dl, MVT::i32));
-  Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg,
+  SDValue lo, hi;
+  lo = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i64, Arg,
+                   DAG.getConstant(0, Dl, MVT::i64));
+  hi = DAG.getNode(ISD::EXTRACT_ELEMENT, Dl, MVT::i32, Arg,
                    DAG.getConstant(1, Dl, MVT::i32));
 
   // Attach the two i32 types into corresponding registers
-  RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo));
-  RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi));
+  RegsToPass.push_back(std::make_pair(VA.getLocReg(), lo));
+  RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), hi));
 }
 
 SDValue


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