[PATCH] D128769: [DAGCombiner][X86] Fold sra (sub AddC, (shl X, N1C)), N1C --> sext (sub AddC1',(trunc X to (width - N1C)))
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 30 17:32:57 PDT 2022
craig.topper added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:9300
+ if (ConstantSDNode *AddC =
+ isConstOrConstSplat(N0.getOperand(IsAdd ? 1 : 0))) {
+ // Determine what the truncate's type would be and ask the target if
----------------
RKSimon wrote:
> Does this have to be a splat? I think technically only N1C has to be and AddC can be non-uniform except it requires the ShiftC calculation to be refactored for general constant folding. But I'm not certain how often isTruncateFree is going to return true for vector types....
I think you're right, but I'd rather not do that in this patch.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128769/new/
https://reviews.llvm.org/D128769
More information about the llvm-commits
mailing list