[llvm] dd58735 - [MC][Mips] Support .reloc *, BFD_RELOC_{NONE, 16, 32, 64}, *

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2022-06-30T16:39:23-07:00
New Revision: dd58735a1d44095f0827bd6f7624a1eb26c1054b

URL: https://github.com/llvm/llvm-project/commit/dd58735a1d44095f0827bd6f7624a1eb26c1054b
DIFF: https://github.com/llvm/llvm-project/commit/dd58735a1d44095f0827bd6f7624a1eb26c1054b.diff

LOG: [MC][Mips] Support .reloc *, BFD_RELOC_{NONE,16,32,64}, *

... to match most other common architectures which already support BFD_RELOC_*.
BFD_RELOC_NONE provides a generic way indicating a dependency between two
sections and is useful for some instrumentations which encode symbol index
information (e.g. `.cg_profile`).

Added: 
    

Modified: 
    llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
    llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
    llvm/test/MC/Mips/reloc-directive.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index a3dbe6f84a1e3..8050f9b8cae0a 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -301,6 +301,15 @@ void MipsAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
 }
 
 Optional<MCFixupKind> MipsAsmBackend::getFixupKind(StringRef Name) const {
+  unsigned Type = llvm::StringSwitch<unsigned>(Name)
+                      .Case("BFD_RELOC_NONE", ELF::R_MIPS_NONE)
+                      .Case("BFD_RELOC_16", ELF::R_MIPS_16)
+                      .Case("BFD_RELOC_32", ELF::R_MIPS_32)
+                      .Case("BFD_RELOC_64", ELF::R_MIPS_64)
+                      .Default(-1u);
+  if (Type != -1u)
+    return static_cast<MCFixupKind>(FirstLiteralRelocationKind + Type);
+
   return StringSwitch<Optional<MCFixupKind>>(Name)
       .Case("R_MIPS_NONE", FK_NONE)
       .Case("R_MIPS_32", FK_Data_4)
@@ -502,6 +511,8 @@ getFixupKindInfo(MCFixupKind Kind) const {
   static_assert(array_lengthof(BigEndianInfos) == Mips::NumTargetFixupKinds,
                 "Not all MIPS big endian fixup kinds added!");
 
+  if (Kind >= FirstLiteralRelocationKind)
+    return MCAsmBackend::getFixupKindInfo(FK_NONE);
   if (Kind < FirstTargetFixupKind)
     return MCAsmBackend::getFixupKindInfo(Kind);
 
@@ -534,6 +545,8 @@ bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
 bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
                                            const MCFixup &Fixup,
                                            const MCValue &Target) {
+  if (Fixup.getKind() >= FirstLiteralRelocationKind)
+    return true;
   const unsigned FixupKind = Fixup.getKind();
   switch (FixupKind) {
   default:

diff  --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
index 9c317e3f8840f..4990696fcfe0b 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
@@ -220,6 +220,8 @@ unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
                                            bool IsPCRel) const {
   // Determine the type of the relocation.
   unsigned Kind = Fixup.getTargetKind();
+  if (Kind >= FirstLiteralRelocationKind)
+    return Kind - FirstLiteralRelocationKind;
 
   switch (Kind) {
   case FK_NONE:

diff  --git a/llvm/test/MC/Mips/reloc-directive.s b/llvm/test/MC/Mips/reloc-directive.s
index 26c52e5e7ca0d..2f699ec98a609 100644
--- a/llvm/test/MC/Mips/reloc-directive.s
+++ b/llvm/test/MC/Mips/reloc-directive.s
@@ -83,6 +83,11 @@ foo:
   nop
   .reloc 132, R_MICROMIPS_JALR, 4       # ASM: .reloc 132, R_MICROMIPS_JALR, 4
   nop
+  .reloc 136, BFD_RELOC_NONE, 9         # ASM: .reloc 136, BFD_RELOC_NONE, 9
+  .reloc 137, BFD_RELOC_16, 9           # ASM: .reloc 137, BFD_RELOC_16, 9
+  .reloc 138, BFD_RELOC_32, 9           # ASM: .reloc 138, BFD_RELOC_32, 9
+  .reloc 139, BFD_RELOC_64, 9           # ASM: .reloc 139, BFD_RELOC_64, 9
+  nop
 
 # OBJ-O32-LABEL: Name: .text
 # OBJ-O32:       0000: 00000000 00000000 00000008 00000000
@@ -128,6 +133,10 @@ foo:
 # OBJ-O32-NEXT:  0x7C R_MICROMIPS_TLS_TPREL_LO16 -
 # OBJ-O32-NEXT:  0x80 R_MIPS_JALR -
 # OBJ-O32-NEXT:  0x84 R_MICROMIPS_JALR -
+# OBJ-O32-NEXT:  0x88 R_MIPS_NONE -
+# OBJ-O32-NEXT:  0x89 R_MIPS_16 -
+# OBJ-O32-NEXT:  0x8A R_MIPS_32 -
+# OBJ-O32-NEXT:  0x8B R_MIPS_64 -
 # OBJ-O32-NEXT:  0x1C R_MIPS_GOT16 -
 # OBJ-O32-NEXT:  0x60 R_MICROMIPS_GOT16 -
 
@@ -178,6 +187,10 @@ foo:
 # OBJ-N32-NEXT:  0x7C R_MICROMIPS_TLS_TPREL_LO16 - 0x4
 # OBJ-N32-NEXT:  0x80 R_MIPS_JALR - 0x4
 # OBJ-N32-NEXT:  0x84 R_MICROMIPS_JALR - 0x4
+# OBJ-N32-NEXT:  0x88 R_MIPS_NONE - 0x9
+# OBJ-N32-NEXT:  0x89 R_MIPS_16 - 0x9
+# OBJ-N32-NEXT:  0x8A R_MIPS_32 - 0x9
+# OBJ-N32-NEXT:  0x8B R_MIPS_64 - 0x9
 
 # OBJ-N64-LABEL: Name: .text
 # OBJ-N64:       0000: 00000000 00000000 00000000 00000000
@@ -225,3 +238,7 @@ foo:
 # OBJ-N64-NEXT:  0x7C R_MICROMIPS_TLS_TPREL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
 # OBJ-N64-NEXT:  0x80 R_MIPS_JALR/R_MIPS_NONE/R_MIPS_NONE - 0x4
 # OBJ-N64-NEXT:  0x84 R_MICROMIPS_JALR/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT:  0x88 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE - 0x9
+# OBJ-N64-NEXT:  0x89 R_MIPS_16/R_MIPS_NONE/R_MIPS_NONE - 0x9
+# OBJ-N64-NEXT:  0x8A R_MIPS_32/R_MIPS_NONE/R_MIPS_NONE - 0x9
+# OBJ-N64-NEXT:  0x8B R_MIPS_64/R_MIPS_NONE/R_MIPS_NONE - 0x9