[PATCH] D128926: [AArch64] NFC: Move safe predicate casting to a separate function.

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 30 09:24:54 PDT 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4308-4309
+  // we can return here.
+  if (ElementCount::isKnownGT(InVT.getVectorElementCount(),
+                              VT.getVectorElementCount()))
+    return Reinterpret;
----------------
`InVT.bitsGT(VT)`? assuming I've got my VTs in the correct order.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4514
   case Intrinsic::aarch64_sve_convert_from_svbool:
-    return DAG.getNode(AArch64ISD::REINTERPRET_CAST, dl, Op.getValueType(),
-                       Op.getOperand(1));
+    return getSVESafePredicateBitCast(Op.getValueType(), Op.getOperand(1), DAG);
   case Intrinsic::aarch64_sve_convert_to_svbool:
----------------
Why is this change needed? This is the scenario when `AArch64ISD::REINTERPRET_CAST` is safe to use directly?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.h:1153
+  // any newly created lanes from a widening bitcast are defined as zero.
+  SDValue getSVESafePredicateBitCast(EVT VT, SDValue Op,
+                                     SelectionDAG &DAG) const;
----------------
Can this be just `getSVEPredicateCast`? because we'll never use this function in the context of a bitcast. Also in this context I think `Safe` can be assumed.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128926/new/

https://reviews.llvm.org/D128926



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