[PATCH] D128918: [DAG] Enable scalable vector handling in SimplifyDemandedBits

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: RKSimon, craig.topper, paulwalker-arm, david-arm, efriedma.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a subscriber: alextsao1999.
Herald added a project: LLVM.

Similar to D128159 <https://reviews.llvm.org/D128159>, this lets the SimplifyDemandedBits and SimplifyMultipleUseDemandedBits functions handle scalable vectors, by requiring that all lanes are demanded for the DemandedElts.


https://reviews.llvm.org/D128918

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/active_lane_mask.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll
  llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp

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