[PATCH] D128756: [AMDGPU] gfx11 WMMA instruction support

Joe Nash via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 30 07:55:39 PDT 2022


Joe_Nash added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3739-3740
+    MachineOperand &Root) const {
+  assert((Root.isImm() && (Root.getImm() == -1 || Root.getImm() == 0)) &&
+         "expected i1 value");
+  unsigned Mods = SISrcMods::OP_SEL_1;
----------------
arsenm wrote:
> Probably should have a verifier check this, or just rely on 0/non-0
I don't know what to do here. The intrinsic has an i1 field. If you put a non-i1 value that will be reported right? Given that, we are asserting that other parts of ISel haven't transformed this value incorrectly. Also, we do the same thing in selectDotIUVOP3PMods, line 3726. Please let me know what could be done.


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  https://reviews.llvm.org/D128756/new/

https://reviews.llvm.org/D128756



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