[PATCH] D128912: [DAG] Enable scalable vector handling in ComputeNumSignBits

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 30 07:27:04 PDT 2022


dmgreen created this revision.
dmgreen added reviewers: RKSimon, craig.topper, paulwalker-arm, david-arm, efriedma.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
dmgreen requested review of this revision.
Herald added a subscriber: alextsao1999.
Herald added a project: LLVM.

Similar to D128159 <https://reviews.llvm.org/D128159>, this relaxes the handling of scalable vectors in ComputeNumSignBits to most nodes that do not require lane-specific handling. The DemandedElts must be of size VectorMinNumElements and all lanes must be demanded.


https://reviews.llvm.org/D128912

Files:
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
  llvm/test/CodeGen/AArch64/sve-smulo-sdnode.ll

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