[PATCH] D128902: [AArch64][SVE] Create AArch64ISD node for DUPQLANE

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 30 03:27:19 PDT 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.h:162
 
+  DUPQLANE,
+
----------------
Given the existing naming perhaps `DUPLANE128` is more consistent?


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrGISel.td:114-118
+def G_DUPQLANE : AArch64GenericInstruction {
+  let OutOperandList = (outs type0:$dst);
+  let InOperandList = (ins type0:$src, type1:$quadword);
+  let hasSideEffects = 0;
+}
----------------
Do you need any of the  `AArch64InstrGISel.td` changes? I suspect not.


================
Comment at: llvm/lib/Target/AArch64/AArch64InstrInfo.td:283
 def SDT_AArch64DupLane   : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<2>]>;
+def SDT_AArch64DupQLane   : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisInt<2>]>;
 def SDT_AArch64Insr  : SDTypeProfile<1, 2, [SDTCisVec<0>]>;
----------------
There's nothing different about `SDT_AArch64DupQLane` compared to `SDT_AArch64DupLane` so you can just reuse `SDT_AArch64DupLane`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128902/new/

https://reviews.llvm.org/D128902



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