[PATCH] D128756: [AMDGPU] gfx11 WMMA instruction support
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 29 10:36:41 PDT 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3739-3740
+ MachineOperand &Root) const {
+ assert((Root.isImm() && (Root.getImm() == -1 || Root.getImm() == 0)) &&
+ "expected i1 value");
+ unsigned Mods = SISrcMods::OP_SEL_1;
----------------
Probably should have a verifier check this, or just rely on 0/non-0
================
Comment at: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp:1708
+ const Register CurSrc2Reg =
+ Src2->isReg() ? Src2->getReg() : AMDGPU::NoRegister;
+
----------------
Can use Register() in place of NoRegister
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:3268
+ .setMIFlags(MI.getFlags());
+ for (unsigned I = 0, E = MI.getDesc().getNumOperands(); I != E; ++I)
+ MIB->addOperand(MI.getOperand(I));
----------------
Why skip implicit operands?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128756/new/
https://reviews.llvm.org/D128756
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