[llvm] d4f39d8 - [InstCombine] add fold for (ShiftC >> X) >u C

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 29 09:31:43 PDT 2022


Author: Sanjay Patel
Date: 2022-06-29T12:30:01-04:00
New Revision: d4f39d8333324bdcf2056a2264bdc5f651ad01e2

URL: https://github.com/llvm/llvm-project/commit/d4f39d8333324bdcf2056a2264bdc5f651ad01e2
DIFF: https://github.com/llvm/llvm-project/commit/d4f39d8333324bdcf2056a2264bdc5f651ad01e2.diff

LOG: [InstCombine] add fold for (ShiftC >> X) >u C

This is the 'ugt' sibling to:
0399473de886595d

Decrement the input compare constant (and implicitly
decrement the new compare constant):
https://alive2.llvm.org/ce/z/iELmct

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    llvm/test/Transforms/InstCombine/icmp-shr.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index d26cc1fe9a2b..4f1ca45df86c 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -2226,13 +2226,19 @@ Instruction *InstCombinerImpl::foldICmpShrConstant(ICmpInst &Cmp,
 
     // If the shifted constant is a power-of-2, test the shift amount directly:
     // (ShiftValC >> X) >u C --> X <u (LZ(C) - LZ(ShiftValC))
-    // TODO: Handle ult.
-    if (!IsAShr && Pred == CmpInst::ICMP_UGT && ShiftValC->isPowerOf2()) {
+    // (ShiftValC >> X) <u C --> X >=u (LZ(C-1) - LZ(ShiftValC))
+    if (!IsAShr && ShiftValC->isPowerOf2() &&
+        (Pred == CmpInst::ICMP_UGT || Pred == CmpInst::ICMP_ULT)) {
+      bool IsUGT = Pred == CmpInst::ICMP_UGT;
       assert(ShiftValC->ugt(C) && "Expected simplify of compare");
-      unsigned CmpLZ = C.countLeadingZeros();
+      assert(IsUGT || !C.isZero() && "Expected X u< 0 to simplify");
+
+      unsigned CmpLZ =
+          IsUGT ? C.countLeadingZeros() : (C - 1).countLeadingZeros();
       unsigned ShiftLZ = ShiftValC->countLeadingZeros();
       Constant *NewC = ConstantInt::get(Shr->getType(), CmpLZ - ShiftLZ);
-      return new ICmpInst(ICmpInst::ICMP_ULT, Shr->User::getOperand(1), NewC);
+      auto NewPred = IsUGT ? CmpInst::ICMP_ULT : CmpInst::ICMP_UGE;
+      return new ICmpInst(NewPred, Shr->getOperand(1), NewC);
     }
   }
 

diff  --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll
index cf5aa4af69d6..5196eacc1877 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shr.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll
@@ -1092,8 +1092,7 @@ define i1 @lshr_pow2_sgt(i8 %x) {
 
 define i1 @lshr_pow2_ult(i8 %x) {
 ; CHECK-LABEL: @lshr_pow2_ult(
-; CHECK-NEXT:    [[S:%.*]] = lshr i8 4, [[X:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i8 [[S]], 2
+; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[X:%.*]], 1
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = lshr i8 4, %x
@@ -1105,7 +1104,7 @@ define i1 @lshr_pow2_ult_use(i8 %x) {
 ; CHECK-LABEL: @lshr_pow2_ult_use(
 ; CHECK-NEXT:    [[S:%.*]] = lshr i8 -128, [[X:%.*]]
 ; CHECK-NEXT:    call void @use(i8 [[S]])
-; CHECK-NEXT:    [[R:%.*]] = icmp ult i8 [[S]], 5
+; CHECK-NEXT:    [[R:%.*]] = icmp ugt i8 [[X]], 4
 ; CHECK-NEXT:    ret i1 [[R]]
 ;
   %s = lshr i8 128, %x
@@ -1116,8 +1115,7 @@ define i1 @lshr_pow2_ult_use(i8 %x) {
 
 define <2 x i1> @lshr_pow2_ult_vec(<2 x i8> %x) {
 ; CHECK-LABEL: @lshr_pow2_ult_vec(
-; CHECK-NEXT:    [[S:%.*]] = lshr <2 x i8> <i8 8, i8 8>, [[X:%.*]]
-; CHECK-NEXT:    [[R:%.*]] = icmp ult <2 x i8> [[S]], <i8 6, i8 6>
+; CHECK-NEXT:    [[R:%.*]] = icmp ne <2 x i8> [[X:%.*]], zeroinitializer
 ; CHECK-NEXT:    ret <2 x i1> [[R]]
 ;
   %s = lshr <2 x i8> <i8 8, i8 8>, %x
@@ -1125,6 +1123,8 @@ define <2 x i1> @lshr_pow2_ult_vec(<2 x i8> %x) {
   ret <2 x i1> %r
 }
 
+; negative test - need power-of-2
+
 define i1 @lshr_not_pow2_ult(i8 %x) {
 ; CHECK-LABEL: @lshr_not_pow2_ult(
 ; CHECK-NEXT:    [[S:%.*]] = lshr i8 3, [[X:%.*]]
@@ -1136,6 +1136,8 @@ define i1 @lshr_not_pow2_ult(i8 %x) {
   ret i1 %r
 }
 
+; TODO: This should reduce to X != 0.
+
 define i1 @lshr_pow2_ult_smin(i8 %x) {
 ; CHECK-LABEL: @lshr_pow2_ult_smin(
 ; CHECK-NEXT:    [[S:%.*]] = lshr i8 -128, [[X:%.*]]
@@ -1147,6 +1149,8 @@ define i1 @lshr_pow2_ult_smin(i8 %x) {
   ret i1 %r
 }
 
+; negative test - need logical shift
+
 define i1 @ashr_pow2_ult(i8 %x) {
 ; CHECK-LABEL: @ashr_pow2_ult(
 ; CHECK-NEXT:    [[S:%.*]] = ashr i8 -128, [[X:%.*]]
@@ -1158,6 +1162,8 @@ define i1 @ashr_pow2_ult(i8 %x) {
   ret i1 %r
 }
 
+; negative test - need unsigned pred
+
 define i1 @lshr_pow2_slt(i8 %x) {
 ; CHECK-LABEL: @lshr_pow2_slt(
 ; CHECK-NEXT:    [[S:%.*]] = lshr i8 -128, [[X:%.*]]


        


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