[PATCH] D128806: [RISCV] Remove DL Information when storeRegToStackSlot

[LiqinWeng via Phabricator via llvm-commits]

Miss_Grape created this revision.
Miss_Grape added reviewers: craig.topper, benshi001, CarlosAlbertoEnciso.
Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya, arichardson.
Herald added a project: All.
Miss_Grape requested review of this revision.
Herald added subscribers: llvm-commits, pcwang-thead, eopXD, jacquesguan, MaskRay.
Herald added a project: LLVM.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D128806

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/test/DebugInfo/RISCV/dbg-prolog-end.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D128806.440941.patch
Type: text/x-patch
Size: 5829 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220629/f2659ef3/attachment.bin>