[llvm] 1774f2e - [AMDGPU][GFX90a][DOC][NFC] Update assembler syntax description
Dmitry Preobrazhensky via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 29 03:31:28 PDT 2022
Author: Dmitry Preobrazhensky
Date: 2022-06-29T13:31:09+03:00
New Revision: 1774f2e326b69017ec4617f30cd5a8f81d643560
URL: https://github.com/llvm/llvm-project/commit/1774f2e326b69017ec4617f30cd5a8f81d643560
DIFF: https://github.com/llvm/llvm-project/commit/1774f2e326b69017ec4617f30cd5a8f81d643560.diff
LOG: [AMDGPU][GFX90a][DOC][NFC] Update assembler syntax description
Summary of changes:
- Update MUBUF lds syntax (see https://reviews.llvm.org/D124485).
- Update SMEM syntax (see https://reviews.llvm.org/D127314).
- Enable src0=literal for v_madak*, v_madmk* (see https://reviews.llvm.org/D111067).
- Correct src0 operands of v_accvgpr_write_b32.
- Correct description of s_getreg/s_setreg (add TBA/TMA).
- Remove SYSMSG_OP_HOST_TRAP_ACK message.
- Minor bug fixing and improvements.
Added:
llvm/docs/AMDGPU/gfx90a_imm16_73139a.rst
llvm/docs/AMDGPU/gfx90a_imm16_a04fb3.rst
llvm/docs/AMDGPU/gfx90a_m_254bcb.rst
llvm/docs/AMDGPU/gfx90a_m_f5d306.rst
llvm/docs/AMDGPU/gfx90a_opt_0d447d.rst
llvm/docs/AMDGPU/gfx90a_opt_847aed.rst
llvm/docs/AMDGPU/gfx90a_saddr_6060e5.rst
llvm/docs/AMDGPU/gfx90a_saddr_a37373.rst
llvm/docs/AMDGPU/gfx90a_sbase_010ce0.rst
llvm/docs/AMDGPU/gfx90a_sbase_044055.rst
llvm/docs/AMDGPU/gfx90a_sbase_0cd545.rst
llvm/docs/AMDGPU/gfx90a_sdata_595c25.rst
llvm/docs/AMDGPU/gfx90a_sdata_7cbd60.rst
llvm/docs/AMDGPU/gfx90a_sdata_aefe00.rst
llvm/docs/AMDGPU/gfx90a_sdata_c6aec1.rst
llvm/docs/AMDGPU/gfx90a_sdata_e9f591.rst
llvm/docs/AMDGPU/gfx90a_sdata_eb6f2a.rst
llvm/docs/AMDGPU/gfx90a_sdst_06b266.rst
llvm/docs/AMDGPU/gfx90a_sdst_0804b1.rst
llvm/docs/AMDGPU/gfx90a_sdst_362c37.rst
llvm/docs/AMDGPU/gfx90a_sdst_3bc700.rst
llvm/docs/AMDGPU/gfx90a_sdst_59204c.rst
llvm/docs/AMDGPU/gfx90a_sdst_718cc4.rst
llvm/docs/AMDGPU/gfx90a_sdst_94342d.rst
llvm/docs/AMDGPU/gfx90a_sdst_a319e6.rst
llvm/docs/AMDGPU/gfx90a_simm32_6f0844.rst
llvm/docs/AMDGPU/gfx90a_simm32_a3e80c.rst
llvm/docs/AMDGPU/gfx90a_simm32_be0c1c.rst
llvm/docs/AMDGPU/gfx90a_soffset_4318ca.rst
llvm/docs/AMDGPU/gfx90a_soffset_8a17c8.rst
llvm/docs/AMDGPU/gfx90a_soffset_ba92ce.rst
llvm/docs/AMDGPU/gfx90a_src_4de5c6.rst
llvm/docs/AMDGPU/gfx90a_src_56ed80.rst
llvm/docs/AMDGPU/gfx90a_src_64ea89.rst
llvm/docs/AMDGPU/gfx90a_src_6cfc4e.rst
llvm/docs/AMDGPU/gfx90a_src_a578ba.rst
llvm/docs/AMDGPU/gfx90a_src_af08be.rst
llvm/docs/AMDGPU/gfx90a_src_d578c4.rst
llvm/docs/AMDGPU/gfx90a_src_d95796.rst
llvm/docs/AMDGPU/gfx90a_src_e1561c.rst
llvm/docs/AMDGPU/gfx90a_src_e5cc81.rst
llvm/docs/AMDGPU/gfx90a_src_f73668.rst
llvm/docs/AMDGPU/gfx90a_srsrc_79ffcd.rst
llvm/docs/AMDGPU/gfx90a_srsrc_e73d16.rst
llvm/docs/AMDGPU/gfx90a_ssrc_4db4a9.rst
llvm/docs/AMDGPU/gfx90a_ssrc_57838b.rst
llvm/docs/AMDGPU/gfx90a_ssrc_595c25.rst
llvm/docs/AMDGPU/gfx90a_ssrc_65f041.rst
llvm/docs/AMDGPU/gfx90a_ssrc_aee59c.rst
llvm/docs/AMDGPU/gfx90a_ssrc_c31902.rst
llvm/docs/AMDGPU/gfx90a_ssrc_c5d631.rst
llvm/docs/AMDGPU/gfx90a_ssrc_c8a322.rst
llvm/docs/AMDGPU/gfx90a_ssrc_e9f591.rst
llvm/docs/AMDGPU/gfx90a_vaddr_0212e3.rst
llvm/docs/AMDGPU/gfx90a_vaddr_5d0b42.rst
llvm/docs/AMDGPU/gfx90a_vaddr_76b997.rst
llvm/docs/AMDGPU/gfx90a_vaddr_9f7133.rst
llvm/docs/AMDGPU/gfx90a_vaddr_b73dc0.rst
llvm/docs/AMDGPU/gfx90a_vaddr_f20ee4.rst
llvm/docs/AMDGPU/gfx90a_vdata0_9ad749.rst
llvm/docs/AMDGPU/gfx90a_vdata0_be4895.rst
llvm/docs/AMDGPU/gfx90a_vdata1_9ad749.rst
llvm/docs/AMDGPU/gfx90a_vdata1_be4895.rst
llvm/docs/AMDGPU/gfx90a_vdata_2a60db.rst
llvm/docs/AMDGPU/gfx90a_vdata_2d0375.rst
llvm/docs/AMDGPU/gfx90a_vdata_848ff7.rst
llvm/docs/AMDGPU/gfx90a_vdata_8e9b87.rst
llvm/docs/AMDGPU/gfx90a_vdata_929b59.rst
llvm/docs/AMDGPU/gfx90a_vdata_9ad749.rst
llvm/docs/AMDGPU/gfx90a_vdata_a5f23e.rst
llvm/docs/AMDGPU/gfx90a_vdata_af2725.rst
llvm/docs/AMDGPU/gfx90a_vdata_be4895.rst
llvm/docs/AMDGPU/gfx90a_vdata_ca6e5f.rst
llvm/docs/AMDGPU/gfx90a_vdata_cfb402.rst
llvm/docs/AMDGPU/gfx90a_vdst_0f48d1.rst
llvm/docs/AMDGPU/gfx90a_vdst_180bef.rst
llvm/docs/AMDGPU/gfx90a_vdst_260aca.rst
llvm/docs/AMDGPU/gfx90a_vdst_5258b4.rst
llvm/docs/AMDGPU/gfx90a_vdst_69a144.rst
llvm/docs/AMDGPU/gfx90a_vdst_78dd0a.rst
llvm/docs/AMDGPU/gfx90a_vdst_7c9848.rst
llvm/docs/AMDGPU/gfx90a_vdst_89680f.rst
llvm/docs/AMDGPU/gfx90a_vdst_8c77d4.rst
llvm/docs/AMDGPU/gfx90a_vdst_a32035.rst
llvm/docs/AMDGPU/gfx90a_vdst_bdb32f.rst
llvm/docs/AMDGPU/gfx90a_vdst_c8d317.rst
llvm/docs/AMDGPU/gfx90a_vdst_c8ee02.rst
llvm/docs/AMDGPU/gfx90a_vdst_d0c0cb.rst
llvm/docs/AMDGPU/gfx90a_vdst_d6f4bd.rst
llvm/docs/AMDGPU/gfx90a_vdst_d8236e.rst
llvm/docs/AMDGPU/gfx90a_vdst_e2898f.rst
llvm/docs/AMDGPU/gfx90a_vdst_ef6c94.rst
llvm/docs/AMDGPU/gfx90a_vdst_f47b9b.rst
llvm/docs/AMDGPU/gfx90a_vdst_fa7dbd.rst
llvm/docs/AMDGPU/gfx90a_vsrc_1027ca.rst
llvm/docs/AMDGPU/gfx90a_vsrc_6802ce.rst
llvm/docs/AMDGPU/gfx90a_vsrc_9ad749.rst
llvm/docs/AMDGPU/gfx90a_vsrc_be4895.rst
llvm/docs/AMDGPU/gfx90a_vsrc_e016a1.rst
llvm/docs/AMDGPU/gfx90a_vsrc_fd235e.rst
Modified:
llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
llvm/docs/AMDGPU/gfx90a_hwreg.rst
llvm/docs/AMDGPU/gfx90a_msg.rst
Removed:
llvm/docs/AMDGPU/gfx90a_imm16.rst
llvm/docs/AMDGPU/gfx90a_imm16_1.rst
llvm/docs/AMDGPU/gfx90a_imm16_2.rst
llvm/docs/AMDGPU/gfx90a_m.rst
llvm/docs/AMDGPU/gfx90a_m_1.rst
llvm/docs/AMDGPU/gfx90a_opt.rst
llvm/docs/AMDGPU/gfx90a_saddr.rst
llvm/docs/AMDGPU/gfx90a_saddr_1.rst
llvm/docs/AMDGPU/gfx90a_sbase.rst
llvm/docs/AMDGPU/gfx90a_sbase_1.rst
llvm/docs/AMDGPU/gfx90a_sbase_2.rst
llvm/docs/AMDGPU/gfx90a_sdata.rst
llvm/docs/AMDGPU/gfx90a_sdata_1.rst
llvm/docs/AMDGPU/gfx90a_sdata_2.rst
llvm/docs/AMDGPU/gfx90a_sdata_3.rst
llvm/docs/AMDGPU/gfx90a_sdata_4.rst
llvm/docs/AMDGPU/gfx90a_sdata_5.rst
llvm/docs/AMDGPU/gfx90a_sdst.rst
llvm/docs/AMDGPU/gfx90a_sdst_1.rst
llvm/docs/AMDGPU/gfx90a_sdst_2.rst
llvm/docs/AMDGPU/gfx90a_sdst_3.rst
llvm/docs/AMDGPU/gfx90a_sdst_4.rst
llvm/docs/AMDGPU/gfx90a_sdst_5.rst
llvm/docs/AMDGPU/gfx90a_sdst_6.rst
llvm/docs/AMDGPU/gfx90a_sdst_7.rst
llvm/docs/AMDGPU/gfx90a_simm32.rst
llvm/docs/AMDGPU/gfx90a_simm32_1.rst
llvm/docs/AMDGPU/gfx90a_simm32_2.rst
llvm/docs/AMDGPU/gfx90a_soffset.rst
llvm/docs/AMDGPU/gfx90a_soffset_1.rst
llvm/docs/AMDGPU/gfx90a_soffset_2.rst
llvm/docs/AMDGPU/gfx90a_src.rst
llvm/docs/AMDGPU/gfx90a_src_1.rst
llvm/docs/AMDGPU/gfx90a_src_10.rst
llvm/docs/AMDGPU/gfx90a_src_11.rst
llvm/docs/AMDGPU/gfx90a_src_2.rst
llvm/docs/AMDGPU/gfx90a_src_3.rst
llvm/docs/AMDGPU/gfx90a_src_4.rst
llvm/docs/AMDGPU/gfx90a_src_5.rst
llvm/docs/AMDGPU/gfx90a_src_6.rst
llvm/docs/AMDGPU/gfx90a_src_7.rst
llvm/docs/AMDGPU/gfx90a_src_8.rst
llvm/docs/AMDGPU/gfx90a_src_9.rst
llvm/docs/AMDGPU/gfx90a_srsrc.rst
llvm/docs/AMDGPU/gfx90a_srsrc_1.rst
llvm/docs/AMDGPU/gfx90a_ssrc.rst
llvm/docs/AMDGPU/gfx90a_ssrc_1.rst
llvm/docs/AMDGPU/gfx90a_ssrc_2.rst
llvm/docs/AMDGPU/gfx90a_ssrc_3.rst
llvm/docs/AMDGPU/gfx90a_ssrc_4.rst
llvm/docs/AMDGPU/gfx90a_ssrc_5.rst
llvm/docs/AMDGPU/gfx90a_ssrc_6.rst
llvm/docs/AMDGPU/gfx90a_ssrc_7.rst
llvm/docs/AMDGPU/gfx90a_ssrc_8.rst
llvm/docs/AMDGPU/gfx90a_vaddr.rst
llvm/docs/AMDGPU/gfx90a_vaddr_1.rst
llvm/docs/AMDGPU/gfx90a_vaddr_2.rst
llvm/docs/AMDGPU/gfx90a_vaddr_3.rst
llvm/docs/AMDGPU/gfx90a_vaddr_4.rst
llvm/docs/AMDGPU/gfx90a_vaddr_5.rst
llvm/docs/AMDGPU/gfx90a_vdata.rst
llvm/docs/AMDGPU/gfx90a_vdata0.rst
llvm/docs/AMDGPU/gfx90a_vdata0_1.rst
llvm/docs/AMDGPU/gfx90a_vdata1.rst
llvm/docs/AMDGPU/gfx90a_vdata1_1.rst
llvm/docs/AMDGPU/gfx90a_vdata_1.rst
llvm/docs/AMDGPU/gfx90a_vdata_10.rst
llvm/docs/AMDGPU/gfx90a_vdata_2.rst
llvm/docs/AMDGPU/gfx90a_vdata_3.rst
llvm/docs/AMDGPU/gfx90a_vdata_4.rst
llvm/docs/AMDGPU/gfx90a_vdata_5.rst
llvm/docs/AMDGPU/gfx90a_vdata_6.rst
llvm/docs/AMDGPU/gfx90a_vdata_7.rst
llvm/docs/AMDGPU/gfx90a_vdata_8.rst
llvm/docs/AMDGPU/gfx90a_vdata_9.rst
llvm/docs/AMDGPU/gfx90a_vdst.rst
llvm/docs/AMDGPU/gfx90a_vdst_1.rst
llvm/docs/AMDGPU/gfx90a_vdst_10.rst
llvm/docs/AMDGPU/gfx90a_vdst_11.rst
llvm/docs/AMDGPU/gfx90a_vdst_12.rst
llvm/docs/AMDGPU/gfx90a_vdst_13.rst
llvm/docs/AMDGPU/gfx90a_vdst_14.rst
llvm/docs/AMDGPU/gfx90a_vdst_15.rst
llvm/docs/AMDGPU/gfx90a_vdst_16.rst
llvm/docs/AMDGPU/gfx90a_vdst_17.rst
llvm/docs/AMDGPU/gfx90a_vdst_18.rst
llvm/docs/AMDGPU/gfx90a_vdst_19.rst
llvm/docs/AMDGPU/gfx90a_vdst_2.rst
llvm/docs/AMDGPU/gfx90a_vdst_3.rst
llvm/docs/AMDGPU/gfx90a_vdst_4.rst
llvm/docs/AMDGPU/gfx90a_vdst_5.rst
llvm/docs/AMDGPU/gfx90a_vdst_6.rst
llvm/docs/AMDGPU/gfx90a_vdst_7.rst
llvm/docs/AMDGPU/gfx90a_vdst_8.rst
llvm/docs/AMDGPU/gfx90a_vdst_9.rst
llvm/docs/AMDGPU/gfx90a_vsrc.rst
llvm/docs/AMDGPU/gfx90a_vsrc_1.rst
llvm/docs/AMDGPU/gfx90a_vsrc_2.rst
llvm/docs/AMDGPU/gfx90a_vsrc_3.rst
llvm/docs/AMDGPU/gfx90a_vsrc_4.rst
llvm/docs/AMDGPU/gfx90a_vsrc_5.rst
################################################################################
diff --git a/llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst b/llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
index 6c1ac12e6a39e..782f616fe60f9 100644
--- a/llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
+++ b/llvm/docs/AMDGPU/AMDGPUAsmGFX90a.rst
@@ -32,686 +32,686 @@ Instructions
DS
------------------------
+--
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_append :ref:`vdst<amdgpu_synid_gfx90a_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>`
- ds_cmpst_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_consume :ref:`vdst<amdgpu_synid_gfx90a_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_dec_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_gws_barrier :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_gws_init :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_gws_sema_br :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_append :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_bpermute_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_cmpst_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_cmpst_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_condxchg32_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_consume :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_dec_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_gws_barrier :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_gws_init :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_gws_sema_br :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_gws_sema_p :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_gws_sema_release_all :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_gws_sema_v :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_inc_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_i32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_i64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_max_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_i32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_i64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_min_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_inc_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_i32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_i64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_i64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_max_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_i32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_i64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_i64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_min_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_mskor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
ds_nop
- ds_or_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>`
- ds_read2_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read2_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read2st64_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read2st64_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_addtid_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b128 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_b96 :ref:`vdst<amdgpu_synid_gfx90a_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_i8_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_i8_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u16_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u16_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u8_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_read_u8_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_rsub_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_sub_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>` :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2st64_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write2st64_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_addtid_b32 :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b128 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b16 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b16_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b8 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b8_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_write_b96 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2st64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg2st64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_1>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_1>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_wrxchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
- ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_or_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_permute_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>`
+ ds_read2_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read2_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read2st64_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read2st64_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_addtid_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b128 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_b96 :ref:`vdst<amdgpu_synid_gfx90a_vdst_260aca>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_i8_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_i8_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u16_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u16_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u8_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_read_u8_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_rsub_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_sub_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_swizzle_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>` :ref:`pattern<amdgpu_synid_sw_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrap_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2st64_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write2st64_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_addtid_b32 :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b128 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b16 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b16_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b8 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b8_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_write_b96 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2st64_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_be4895>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_be4895>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg2st64_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata0<amdgpu_synid_gfx90a_vdata0_9ad749>`, :ref:`vdata1<amdgpu_synid_gfx90a_vdata1_9ad749>` :ref:`offset0<amdgpu_synid_ds_offset80>` :ref:`offset1<amdgpu_synid_ds_offset81>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_wrxchg_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_rtn_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
+ ds_xor_rtn_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset<amdgpu_synid_ds_offset16>` :ref:`gds<amdgpu_synid_gds>`
FLAT
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
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- flat_atomic_add :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_add_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_and :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_dec :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_inc :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_max_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_min_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_or :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smax :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smin :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_sub :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_swap :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umax :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umin :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_xor :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_byte :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dword :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_short :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- flat_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_1>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_add :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_add_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_add_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_and :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_dec :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_inc :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_max_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_min_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_or :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_smax :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_smin :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_sub :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_swap :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_umax :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_umin :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_xor :ref:`vdst<amdgpu_synid_gfx90a_vdst_4>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_5>`::ref:`opt<amdgpu_synid_gfx90a_opt>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_byte :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_dword :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_short :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- global_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_byte :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_dword :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_short :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- scratch_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_add :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_add_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_and :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_dec :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_inc :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_max_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_min_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_or :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smax :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smin :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_sub :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_swap :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umax :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umin :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_xor :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_260aca>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_byte :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dword :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_short :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ flat_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_9f7133>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>` :ref:`offset12<amdgpu_synid_flat_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_add :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_add_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_add_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_add_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_and :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_and_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_cmpswap :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_cmpswap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_dec :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_dec_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_inc :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_inc_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_max_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_min_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_or :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_or_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_smax :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_smax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_smin :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_smin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_sub :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_sub_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_swap :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_swap_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_umax :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_umax_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_umin :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_umin_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_xor :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8ee02>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_atomic_xor_x2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_ef6c94>`::ref:`opt<amdgpu_synid_gfx90a_opt_847aed>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_260aca>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_byte :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_dword :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_short :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ global_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_260aca>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_byte :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_byte_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_dword :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_dwordx2 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_dwordx3 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_dwordx4 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_short :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ scratch_store_short_d16_hi :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>`, :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` :ref:`offset13s<amdgpu_synid_flat_offset13s>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
MIMG
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- image_atomic_add :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_and :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx90a_vdata_5>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_dec :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_inc :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_or :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_smax :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_smin :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_sub :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_swap :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_umax :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_umin :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_atomic_xor :ref:`vdata<amdgpu_synid_gfx90a_vdata_4>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_get_resinfo :ref:`vdst<amdgpu_synid_gfx90a_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load :ref:`vdst<amdgpu_synid_gfx90a_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_load_mip :ref:`vdst<amdgpu_synid_gfx90a_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx90a_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx90a_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load_pck :ref:`vdst<amdgpu_synid_gfx90a_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx90a_vdst_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_sample :ref:`vdst<amdgpu_synid_gfx90a_vdst_7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>`, :ref:`ssamp<amdgpu_synid_gfx90a_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_store :ref:`vdata<amdgpu_synid_gfx90a_vdata_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_store_mip :ref:`vdata<amdgpu_synid_gfx90a_vdata_6>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
- image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx90a_vdata_7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
- image_store_pck :ref:`vdata<amdgpu_synid_gfx90a_vdata_7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_4>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_add :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_and :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx90a_vdata_ca6e5f>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_dec :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_inc :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_or :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_smax :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_smin :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_sub :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_swap :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_umax :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_umin :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_atomic_xor :ref:`vdata<amdgpu_synid_gfx90a_vdata_af2725>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_get_resinfo :ref:`vdst<amdgpu_synid_gfx90a_vdst_f47b9b>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load :ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_load_mip :ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_load_mip_pck :ref:`vdst<amdgpu_synid_gfx90a_vdst_f47b9b>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load_mip_pck_sgn :ref:`vdst<amdgpu_synid_gfx90a_vdst_f47b9b>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load_pck :ref:`vdst<amdgpu_synid_gfx90a_vdst_f47b9b>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_load_pck_sgn :ref:`vdst<amdgpu_synid_gfx90a_vdst_f47b9b>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_sample :ref:`vdst<amdgpu_synid_gfx90a_vdst_7c9848>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>`, :ref:`ssamp<amdgpu_synid_gfx90a_ssamp>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_store :ref:`vdata<amdgpu_synid_gfx90a_vdata_a5f23e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_store_mip :ref:`vdata<amdgpu_synid_gfx90a_vdata_a5f23e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>` :ref:`d16<amdgpu_synid_d16>`
+ image_store_mip_pck :ref:`vdata<amdgpu_synid_gfx90a_vdata_929b59>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
+ image_store_pck :ref:`vdata<amdgpu_synid_gfx90a_vdata_929b59>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5d0b42>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_79ffcd>` :ref:`dmask<amdgpu_synid_dmask>` :ref:`unorm<amdgpu_synid_unorm>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`a16<amdgpu_synid_a16>` :ref:`lwe<amdgpu_synid_lwe>` :ref:`da<amdgpu_synid_da>`
MTBUF
------------------------
+-----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_e2898f>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_a32035>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_x :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ tbuffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`fmt<amdgpu_synid_fmt>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
MUBUF
------------------------
+-----
.. parsed-literal::
- **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_add_f32 :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_add_f64 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_10>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_max_f64 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_min_f64 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_pk_add_f16 :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx90a_vdata_8>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ **INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **SRC3** **MODIFIERS**
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ buffer_atomic_add :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_add_f32 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_add_f64 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_add_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_and :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_and_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_cmpswap :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_cmpswap_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_8e9b87>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_dec :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_dec_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_inc :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_inc_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_max_f64 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_min_f64 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_or :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_or_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_pk_add_f16 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smax :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smax_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smin :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_smin_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_sub :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_sub_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_swap :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_swap_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umax :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umax_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umin :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_umin_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_xor :ref:`vdata<amdgpu_synid_gfx90a_vdata_2a60db>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_atomic_xor_x2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2d0375>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
buffer_invl2
- buffer_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_hi_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_9>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_10>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_11>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_8>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst_12>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
- buffer_store_byte :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_byte_d16_hi :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dword :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_hi_x :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata_1>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_3>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_2>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_lds_dword :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`lds<amdgpu_synid_lds>`
- buffer_store_short :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
- buffer_store_short_d16_hi :ref:`vdata<amdgpu_synid_gfx90a_vdata>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_5>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dword :ref:`vdst<amdgpu_synid_gfx90a_vdst_5258b4>`::ref:`opt<amdgpu_synid_gfx90a_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_dwordx2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dwordx3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_e2898f>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_dwordx4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_a32035>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_hi_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_d16_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_x :ref:`vdst<amdgpu_synid_gfx90a_vdst_5258b4>`::ref:`opt<amdgpu_synid_gfx90a_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_format_xy :ref:`vdst<amdgpu_synid_gfx90a_vdst_d8236e>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_xyz :ref:`vdst<amdgpu_synid_gfx90a_vdst_e2898f>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_format_xyzw :ref:`vdst<amdgpu_synid_gfx90a_vdst_a32035>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_sbyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_5258b4>`::ref:`opt<amdgpu_synid_gfx90a_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_sbyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_sbyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_short_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_short_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_sshort :ref:`vdst<amdgpu_synid_gfx90a_vdst_5258b4>`::ref:`opt<amdgpu_synid_gfx90a_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_ubyte :ref:`vdst<amdgpu_synid_gfx90a_vdst_5258b4>`::ref:`opt<amdgpu_synid_gfx90a_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_load_ubyte_d16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_ubyte_d16_hi :ref:`vdst<amdgpu_synid_gfx90a_vdst_d0c0cb>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_load_ushort :ref:`vdst<amdgpu_synid_gfx90a_vdst_5258b4>`::ref:`opt<amdgpu_synid_gfx90a_opt_0d447d>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_store_byte :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_byte_d16_hi :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dword :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx2 :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx3 :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_dwordx4 :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_hi_x :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_x :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_d16_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_x :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xy :ref:`vdata<amdgpu_synid_gfx90a_vdata_9ad749>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xyz :ref:`vdata<amdgpu_synid_gfx90a_vdata_cfb402>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_format_xyzw :ref:`vdata<amdgpu_synid_gfx90a_vdata_848ff7>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_lds_dword :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`lds<amdgpu_synid_lds>`
+ buffer_store_short :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
+ buffer_store_short_d16_hi :ref:`vdata<amdgpu_synid_gfx90a_vdata_be4895>`, :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_b73dc0>`, :ref:`srsrc<amdgpu_synid_gfx90a_srsrc_e73d16>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_4318ca>` :ref:`idxen<amdgpu_synid_idxen>` :ref:`offen<amdgpu_synid_offen>` :ref:`offset12<amdgpu_synid_buf_offset12>` :ref:`glc<amdgpu_synid_glc>` :ref:`slc<amdgpu_synid_slc>`
buffer_wbinvl1
buffer_wbinvl1_vol
buffer_wbl2
SMEM
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
- \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_atc_probe :ref:`probe<amdgpu_synid_gfx90a_probe>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>`
- s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx90a_probe>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>`
- s_atomic_add :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_and :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_2>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_dec :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_inc :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_or :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smax :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smin :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_sub :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_swap :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umax :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umin :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_xor :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_2>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx90a_sdata>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx90a_sdst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx90a_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx90a_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx90a_sdata_3>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx90a_sdata_5>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_1>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_2>` :ref:`glc<amdgpu_synid_glc>`
- s_dcache_discard :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>`
- s_dcache_discard_x2 :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>`
+ \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
+ s_atc_probe :ref:`probe<amdgpu_synid_gfx90a_probe>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
+ s_atc_probe_buffer :ref:`probe<amdgpu_synid_gfx90a_probe>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>`
+ s_atomic_add :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_and :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_dec :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_inc :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_or :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smax :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smin :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_sub :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_swap :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umax :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umin :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_xor :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_add :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_add_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_and :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_and_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_cmpswap :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b32x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_cmpswap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_c6aec1>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`b64x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_dec :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_dec_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_inc :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_inc_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_or :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_or_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smax :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smin :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_smin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_sub :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_sub_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_swap :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_swap_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umax :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umax_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umin :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_umin_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_xor :ref:`sdata<amdgpu_synid_gfx90a_sdata_aefe00>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_atomic_xor_x2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_eb6f2a>`::ref:`dst<amdgpu_synid_gfx90a_dst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dword :ref:`sdst<amdgpu_synid_gfx90a_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx90a_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx90a_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dword :ref:`sdata<amdgpu_synid_gfx90a_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_buffer_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx90a_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_010ce0>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_ba92ce>` :ref:`offset20u<amdgpu_synid_smem_offset20u>` :ref:`glc<amdgpu_synid_glc>`
+ s_dcache_discard :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
+ s_dcache_discard_x2 :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>`
s_dcache_inv
s_dcache_inv_vol
s_dcache_wb
s_dcache_wb_vol
- s_load_dword :ref:`sdst<amdgpu_synid_gfx90a_sdst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_1>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx90a_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx90a_sdst_4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_memrealtime :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`::ref:`b64<amdgpu_synid_gfx90a_type_deviation>`
- s_memtime :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`::ref:`b64<amdgpu_synid_gfx90a_type_deviation>`
- s_scratch_load_dword :ref:`sdst<amdgpu_synid_gfx90a_sdst>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx90a_sdst_3>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_store_dword :ref:`sdata<amdgpu_synid_gfx90a_sdata_3>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_scratch_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx90a_sdata_5>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_2>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dword :ref:`sdata<amdgpu_synid_gfx90a_sdata_3>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
- s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx90a_sdata_5>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_1>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dword :ref:`sdst<amdgpu_synid_gfx90a_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_3bc700>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx90a_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_load_dwordx8 :ref:`sdst<amdgpu_synid_gfx90a_sdst_362c37>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_memrealtime :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`::ref:`b64<amdgpu_synid_gfx90a_type_deviation>`
+ s_memtime :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`::ref:`b64<amdgpu_synid_gfx90a_type_deviation>`
+ s_scratch_load_dword :ref:`sdst<amdgpu_synid_gfx90a_sdst_94342d>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_load_dwordx2 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_load_dwordx4 :ref:`sdst<amdgpu_synid_gfx90a_sdst_0804b1>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_store_dword :ref:`sdata<amdgpu_synid_gfx90a_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_scratch_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx90a_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_0cd545>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dword :ref:`sdata<amdgpu_synid_gfx90a_sdata_595c25>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dwordx2 :ref:`sdata<amdgpu_synid_gfx90a_sdata_e9f591>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
+ s_store_dwordx4 :ref:`sdata<amdgpu_synid_gfx90a_sdata_7cbd60>`, :ref:`sbase<amdgpu_synid_gfx90a_sbase_044055>`, :ref:`soffset<amdgpu_synid_gfx90a_soffset_8a17c8>` :ref:`offset21s<amdgpu_synid_smem_offset21s>` :ref:`glc<amdgpu_synid_glc>`
SOP1
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_abs_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_andn1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_andn1_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_andn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_andn2_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_bitreplicate_b64_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- s_brev_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_brev_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_cbranch_join :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_2>`
- s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_ff0_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_ff0_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_ff1_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_ff1_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_flbit_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_flbit_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_flbit_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_flbit_i32_i64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`
- s_mov_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_mov_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_2>`
- s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_3>`
- s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_not_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_not_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_orn1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_orn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_rfe_b64 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_3>`
- s_set_gpr_idx_idx :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_setpc_b64 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_3>`
- s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_3>`
- s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`
- s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
- s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_1>`
+ s_abs_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_and_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_andn1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_andn1_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_andn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_andn2_wrexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_bcnt0_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bcnt0_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_bcnt1_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bcnt1_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_bitreplicate_b64_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bitset0_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bitset0_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ s_bitset1_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bitset1_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ s_brev_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_brev_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_cbranch_join :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_595c25>`
+ s_cmov_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmov_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_ff0_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_ff0_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_ff1_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_ff1_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_flbit_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_flbit_i32_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_flbit_i32_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_flbit_i32_i64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_getpc_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`
+ s_mov_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_mov_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_movreld_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_94342d>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_movreld_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_movrels_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_595c25>`
+ s_movrels_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_e9f591>`
+ s_nand_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_nor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_not_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_not_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_or_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_orn1_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_orn2_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_quadmask_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_quadmask_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_rfe_b64 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_e9f591>`
+ s_set_gpr_idx_idx :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_setpc_b64 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_e9f591>`
+ s_sext_i32_i16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_sext_i32_i8 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_swappc_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_e9f591>`
+ s_wqm_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_wqm_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_xnor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_xor_saveexec_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_aee59c>`
SOP2
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_abs
diff _i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_add_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_addc_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_and_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_and_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_andn2_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_andn2_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- s_cbranch_g_fork :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_4>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_4>`
- s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_lshl1_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_lshl2_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_lshl3_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_lshl4_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_max_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_max_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_min_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_min_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_mul_hi_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_mul_hi_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_mul_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_nand_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_nand_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_nor_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_nor_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_or_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_or_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_orn2_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_orn2_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_pack_hh_b32_b16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- s_pack_lh_b32_b16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- s_pack_ll_b32_b16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_rfe_restore_b64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- s_sub_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_sub_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_subb_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_xor_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_xor_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
+ s_abs
diff _i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_add_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_addc_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_and_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_and_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_andn2_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_andn2_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_ashr_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_ashr_i64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_bfe_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_bfe_i64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_bfe_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bfe_u64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_bfm_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bfm_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ s_cbranch_g_fork :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c31902>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c31902>`
+ s_cselect_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cselect_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_lshl1_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_lshl2_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_lshl3_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_lshl4_add_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_lshl_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_lshl_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_lshr_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_lshr_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_max_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_max_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_min_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_min_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_mul_hi_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_mul_hi_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_mul_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_nand_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_nand_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_nor_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_nor_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_or_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_or_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_orn2_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_orn2_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_pack_hh_b32_b16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ s_pack_lh_b32_b16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ s_pack_ll_b32_b16 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_rfe_restore_b64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ s_sub_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_sub_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_subb_u32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_xnor_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_xnor_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_xor_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_xor_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
SOPC
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_1>`
- s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
- s_set_gpr_idx_on :ref:`ssrc<amdgpu_synid_gfx90a_ssrc>`, :ref:`imask<amdgpu_synid_gfx90a_imask>`
- s_setvskip :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc>`
+ s_bitcmp0_b32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bitcmp0_b64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_bitcmp1_b32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_bitcmp1_b64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ s_cmp_eq_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_eq_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_eq_u64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_cmp_ge_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_ge_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_gt_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_gt_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_le_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_le_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_lg_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_lg_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_lg_u64 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_aee59c>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_aee59c>`
+ s_cmp_lt_i32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_cmp_lt_u32 :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
+ s_set_gpr_idx_on :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`imask<amdgpu_synid_gfx90a_imask>`
+ s_setvskip :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_c5d631>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_c5d631>`
SOPK
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- s_addk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_call_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`label<amdgpu_synid_gfx90a_label>`
- s_cbranch_i_fork :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_5>`, :ref:`label<amdgpu_synid_gfx90a_label>`
- s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_1>`
- s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_1>`
- s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_1>`
- s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_1>`
- s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_1>`
- s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_1>`
- s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`hwreg<amdgpu_synid_gfx90a_hwreg>`
- s_movk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_5>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16>`
- s_setreg_b32 :ref:`hwreg<amdgpu_synid_gfx90a_hwreg>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_6>`
- s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid_gfx90a_hwreg>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32>`
+ s_addk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_call_b64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`label<amdgpu_synid_gfx90a_label>`
+ s_cbranch_i_fork :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_65f041>`, :ref:`label<amdgpu_synid_gfx90a_label>`
+ s_cmovk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_eq_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_eq_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_a04fb3>`
+ s_cmpk_ge_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_ge_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_a04fb3>`
+ s_cmpk_gt_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_gt_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_a04fb3>`
+ s_cmpk_le_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_le_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_a04fb3>`
+ s_cmpk_lg_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_lg_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_a04fb3>`
+ s_cmpk_lt_i32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_cmpk_lt_u32 :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_a04fb3>`
+ s_getreg_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`hwreg<amdgpu_synid_gfx90a_hwreg>`
+ s_movk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_mulk_i32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_06b266>`, :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_setreg_b32 :ref:`hwreg<amdgpu_synid_gfx90a_hwreg>`, :ref:`ssrc<amdgpu_synid_gfx90a_ssrc_c8a322>`
+ s_setreg_imm32_b32 :ref:`hwreg<amdgpu_synid_gfx90a_hwreg>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_a3e80c>`
SOPP
------------------------
+----
.. parsed-literal::
@@ -729,1260 +729,1260 @@ SOPP
s_cbranch_scc1 :ref:`label<amdgpu_synid_gfx90a_label>`
s_cbranch_vccnz :ref:`label<amdgpu_synid_gfx90a_label>`
s_cbranch_vccz :ref:`label<amdgpu_synid_gfx90a_label>`
- s_decperflevel :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
+ s_decperflevel :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
s_endpgm
s_endpgm_ordered_ps_done
s_endpgm_saved
s_icache_inv
- s_incperflevel :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
- s_nop :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
+ s_incperflevel :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_nop :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
s_sendmsg :ref:`msg<amdgpu_synid_gfx90a_msg>`
s_sendmsghalt :ref:`msg<amdgpu_synid_gfx90a_msg>`
s_set_gpr_idx_mode :ref:`imask<amdgpu_synid_gfx90a_imask>`
s_set_gpr_idx_off
- s_sethalt :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
- s_setkill :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
- s_setprio :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
- s_sleep :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
- s_trap :ref:`imm16<amdgpu_synid_gfx90a_imm16_2>`
+ s_sethalt :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_setkill :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_setprio :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_sleep :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
+ s_trap :ref:`imm16<amdgpu_synid_gfx90a_imm16_73139a>`
s_ttracedata
s_waitcnt :ref:`waitcnt<amdgpu_synid_gfx90a_waitcnt>`
s_wakeup
VOP1
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_accvgpr_mov_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_13>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc>`
- v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_ceil_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_accvgpr_mov_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_78dd0a>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1027ca>`
+ v_bfrev_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_bfrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_bfrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_ceil_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ceil_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_ceil_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ceil_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ceil_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_ceil_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
v_clrexcp
- v_cos_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cos_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_3>`
- v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_3>`
- v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_cvt_f32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_flr_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_cvt_i32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_norm_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_norm_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_rpi_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_cvt_u32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_exp_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_exp_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_exp_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_exp_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbh_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbh_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_ffbl_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_floor_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_floor_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fract_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_fract_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_fract_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_fract_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_frexp_exp_i32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_frexp_mant_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_log_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_log_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_log_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_log_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_mov_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cos_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cos_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cos_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cos_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cos_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cos_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f16_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f16_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_4de5c6>`
+ v_cvt_f16_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f16_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f16_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_4de5c6>`
+ v_cvt_f16_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f16_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_cvt_f32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte0 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_ubyte0_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte0_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte1 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_ubyte1_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte1_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte2 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_ubyte2_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte2_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f32_ubyte3 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f32_ubyte3_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_f32_ubyte3_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_f64_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f64_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_f64_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_flr_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_flr_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_flr_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_i32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_cvt_i32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_norm_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_norm_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_norm_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_norm_u16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_norm_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_norm_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_off_f32_i4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_off_f32_i4_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_off_f32_i4_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_rpi_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_rpi_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_rpi_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_u16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_u16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_cvt_u32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cvt_u32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_cvt_u32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_cvt_u32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_exp_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_exp_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_exp_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_exp_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_exp_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_exp_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbh_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_ffbh_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ffbh_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbh_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_ffbh_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ffbh_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_ffbl_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_ffbl_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ffbl_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_floor_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_floor_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_floor_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_floor_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_floor_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_floor_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fract_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_fract_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fract_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_fract_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_fract_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fract_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_fract_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_fract_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_exp_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_frexp_exp_i16_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_exp_i16_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_exp_i32_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_frexp_exp_i32_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_exp_i32_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_exp_i32_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_frexp_exp_i32_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_mant_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_frexp_mant_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_mant_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_mant_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_frexp_mant_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_frexp_mant_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_frexp_mant_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_frexp_mant_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_log_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_log_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_log_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_log_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_log_legacy_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_log_legacy_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_mov_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_mov_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mov_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
v_nop
- v_not_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_readfirstlane_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_7>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`
- v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_sat_pk_u8_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sat_pk_u8_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_screen_partition_4se_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_screen_partition_4se_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_screen_partition_4se_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sin_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sin_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_swap_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`
- v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src>`
- v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
- v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_2>`
- v_trunc_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_not_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_not_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_not_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rcp_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rcp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rcp_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rcp_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rcp_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_rcp_iflag_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rcp_iflag_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rcp_iflag_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_readfirstlane_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_59204c>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_rndne_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rndne_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rndne_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rndne_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rndne_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rndne_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rndne_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_rsq_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rsq_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rsq_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rsq_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_rsq_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_rsq_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_rsq_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_sat_pk_u8_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_sat_pk_u8_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sat_pk_u8_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_screen_partition_4se_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_screen_partition_4se_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_screen_partition_4se_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sin_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_sin_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sin_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sin_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_sin_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sin_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_sqrt_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sqrt_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_sqrt_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sqrt_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_sqrt_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_swap_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_trunc_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_trunc_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_trunc_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_trunc_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_e1561c>`
+ v_trunc_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_trunc_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>`
+ v_trunc_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_56ed80>`
+ v_trunc_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
VOP2
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_add_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_add_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_add_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_add_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_add_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_addc_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
- v_addc_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_addc_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_and_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_ashrrev_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
- v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`
- v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_dot2c_i32_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`
- v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`
- v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_dot8c_i32_i4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`
- v_dot8c_i32_i4_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_fmac_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_fmac_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>`
- v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_lshlrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_lshrrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mac_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mac_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mac_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_madak_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_1>`
- v_madak_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_2>`
- v_madmk_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_1>`, :ref:`vsrc2<amdgpu_synid_gfx90a_vsrc_1>`
- v_madmk_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_2>`, :ref:`vsrc2<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_max_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_min_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_min_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_min_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_lo_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_lo_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_or_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_pk_fmac_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_sub_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_sub_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_sub_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_sub_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_sub_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subb_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
- v_subb_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subb_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subbrev_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
- v_subbrev_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subbrev_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_subrev_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_subrev_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_subrev_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_subrev_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_xor_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
- v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_add_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_add_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_add_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_add_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_add_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_add_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_add_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_addc_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
+ v_addc_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_addc_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_and_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_and_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_and_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_ashrrev_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ashrrev_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_ashrrev_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_ashrrev_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ashrrev_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cndmask_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
+ v_cndmask_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_cndmask_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_dot2c_f32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`
+ v_dot2c_f32_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_dot2c_i32_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`
+ v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_dot4c_i32_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`
+ v_dot4c_i32_i8_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_dot8c_i32_i4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`
+ v_dot8c_i32_i4_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fmac_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_fmac_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_fmac_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_fmac_f64_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp64_ctrl<amdgpu_synid_dpp64_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ldexp_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>`
+ v_ldexp_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_ldexp_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_lshlrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshlrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshlrev_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_lshlrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshlrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_lshrrev_b16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshrrev_b16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_lshrrev_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_lshrrev_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_lshrrev_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mac_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mac_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mac_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mac_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_madak_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_be0c1c>`
+ v_madak_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_6f0844>`
+ v_madmk_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_be0c1c>`, :ref:`vsrc2<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_madmk_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`simm32<amdgpu_synid_gfx90a_simm32_6f0844>`, :ref:`vsrc2<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_max_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_max_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_max_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_min_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_min_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_min_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_i16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_min_i32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_i32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_min_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_min_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_min_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_min_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_hi_i32_i24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_hi_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_hi_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_hi_u32_u24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_hi_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_hi_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_i32_i24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_i32_i24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_i32_i24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_lo_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_lo_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_mul_u32_u24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_mul_u32_u24_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_mul_u32_u24_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_or_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_or_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_or_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_pk_fmac_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_sub_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_sub_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_sub_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_sub_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_sub_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_sub_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_sub_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_sub_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subb_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
+ v_subb_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subb_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subbrev_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`
+ v_subbrev_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subbrev_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_co_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_subrev_co_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_co_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_subrev_f16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_f16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_subrev_f32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_f32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_subrev_u16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_u16_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_subrev_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_subrev_u32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_subrev_u32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_xnor_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_xnor_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_xnor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_xor_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_xor_b32_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>` :ref:`dpp32_ctrl<amdgpu_synid_dpp32_ctrl>` :ref:`row_mask<amdgpu_synid_row_mask>` :ref:`bank_mask<amdgpu_synid_bank_mask>` :ref:`bound_ctrl<amdgpu_synid_bound_ctrl>`
+ v_xor_b32_sdwa :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`dst_sel<amdgpu_synid_dst_sel>` :ref:`dst_unused<amdgpu_synid_dst_unused>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
VOP3
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST0** **DST1** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_add3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_add_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_add_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_add_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>`
- v_add_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_addc_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_3>` :ref:`clamp<amdgpu_synid_clamp>`
- v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>`::ref:`b16<amdgpu_synid_gfx90a_type_deviation>`
- v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>`::ref:`b16<amdgpu_synid_gfx90a_type_deviation>`
- v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_add_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_add_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_lshl_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_add_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_add_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_addc_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_e9f591>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_alignbit_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>`::ref:`b16<amdgpu_synid_gfx90a_type_deviation>`
+ v_alignbyte_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>`::ref:`b16<amdgpu_synid_gfx90a_type_deviation>`
+ v_and_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_and_or_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_ashrrev_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_ashrrev_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_ashrrev_i64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_bcnt_u32_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_bfe_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ v_bfe_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_bfi_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_bfm_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_bfrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_ceil_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ceil_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ceil_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
v_clrexcp_e64
- v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_3>`
- v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`
- v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`
- v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`
- v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fixup_legacy_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`
- v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fma_legacy_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fmac_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`
- v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`
- v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`
- v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`
- v_mac_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_legacy_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mad_legacy_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_legacy_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_max3_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max3_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_max3_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_max3_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_max3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_max_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_max_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_med3_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_med3_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_med3_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_med3_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_med3_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_med3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_min3_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_min3_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min3_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_min3_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_min3_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_min3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_min_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_min_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`u8x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_16>`::ref:`u32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`u8x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx90a_vsrc_3>`::ref:`u32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_msad_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mul_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`
- v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmp_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmp_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmp_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmp_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmp_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmp_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmp_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_class_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmpx_class_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmpx_class_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmpx_eq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_eq_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_eq_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_eq_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_eq_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_eq_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_eq_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_f_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_f_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_f_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_f_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_f_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_f_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_f_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_ge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ge_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_ge_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_ge_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_ge_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_ge_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_ge_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_gt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_gt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_gt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_gt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_gt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_gt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_gt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_le_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_le_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_le_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_le_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_le_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_le_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_le_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_lg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_lt_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_lt_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_lt_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_lt_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_lt_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_lt_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_ne_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_ne_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_ne_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_ne_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_ne_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_ne_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_neq_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_neq_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_neq_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nge_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_ngt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nle_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlg_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_nlt_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_o_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_t_i16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_t_i32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_t_i64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_t_u16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_cmpx_t_u32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_cmpx_t_u64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_cmpx_tru_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_tru_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_tru_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f16_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f32_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cmpx_u_f64_e64 :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cndmask_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_e9f591>`
+ v_cos_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cos_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubeid_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubema_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubesc_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cubetc_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f16_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte0_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte1_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte2_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f32_ubyte3_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_f64_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_flr_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`
+ v_cvt_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_norm_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_norm_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_off_f32_i4_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_cvt_pk_i16_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_pk_u16_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_pk_u8_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_pkaccum_u8_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_pknorm_i16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_cvt_pknorm_i16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_pknorm_u16_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f16<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_cvt_pknorm_u16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_pkrtz_f16_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cvt_rpi_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`
+ v_cvt_u16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_u32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_cvt_u32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_div_fixup_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_div_fixup_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fixup_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fixup_legacy_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fmas_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_fmas_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_div_scale_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_div_scale_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`
+ v_exp_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_exp_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_exp_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ffbh_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_ffbh_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_ffbl_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_floor_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_floor_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_floor_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fma_legacy_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fmac_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fmac_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_fract_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_exp_i16_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`
+ v_frexp_exp_i32_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`
+ v_frexp_exp_i32_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`
+ v_frexp_mant_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_mant_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_frexp_mant_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i16<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_ldexp_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_lerp_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_log_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_log_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_log_legacy_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_lshl_add_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_lshl_or_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_lshlrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_lshlrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_lshlrev_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_lshrrev_b16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_lshrrev_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_lshrrev_b64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`
+ v_mac_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mac_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i32_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i32_i24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_i64_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`i64<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_legacy_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mad_legacy_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_legacy_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u32_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u32_u24 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mad_u64_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`u64<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_max3_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_max3_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max3_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_max3_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_max3_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_max3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_max_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_max_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_max_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_max_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_max_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mbcnt_hi_u32_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mbcnt_lo_u32_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_med3_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_med3_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_med3_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_med3_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_med3_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_med3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_min3_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_min3_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min3_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_min3_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_min3_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_min3_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_min_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_min_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_min_i32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_min_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_min_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mov_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mqsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`u8x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mqsad_u32_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_69a144>`::ref:`u32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`u8x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc2<amdgpu_synid_gfx90a_vsrc_e016a1>`::ref:`u32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_msad_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mul_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_hi_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mul_hi_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mul_hi_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mul_hi_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mul_i32_i24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mul_legacy_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_mul_lo_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`
+ v_mul_lo_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_mul_u32_u24_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
v_nop_e64
- v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_or3_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
- v_perm_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`u8x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_7>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_1>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_7>`
- v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sad_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_screen_partition_4se_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`
- v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_sub_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>`
- v_sub_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subb_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_3>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subbrev_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_3>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_subrev_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`clamp<amdgpu_synid_clamp>`
- v_subrev_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`clamp<amdgpu_synid_clamp>`
- v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src<amdgpu_synid_gfx90a_src_5>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
- v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_8>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_7>`
- v_xad_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`
- v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
- v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`
+ v_not_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_or3_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_or_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_pack_b32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>`
+ v_perm_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_qsad_pk_u16_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`u8x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>`::ref:`u16x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_rcp_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rcp_iflag_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_readlane_b32 :ref:`sdst<amdgpu_synid_gfx90a_sdst_59204c>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_6802ce>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_57838b>`
+ v_rndne_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rndne_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rndne_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_rsq_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sad_hi_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sad_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sat_pk_u8_i16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_screen_partition_4se_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_sin_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sin_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sqrt_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_sub_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_vop3_op_sel>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_i32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_sub_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subb_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_e9f591>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subbrev_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`ssrc2<amdgpu_synid_gfx90a_ssrc_e9f591>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_co_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_subrev_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_subrev_u16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_subrev_u32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_trig_preop_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f16_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_trunc_f64_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src<amdgpu_synid_gfx90a_src_f73668>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`clamp<amdgpu_synid_clamp>` :ref:`omod<amdgpu_synid_omod>`
+ v_writelane_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`ssrc0<amdgpu_synid_gfx90a_ssrc_4db4a9>`, :ref:`ssrc1<amdgpu_synid_gfx90a_ssrc_57838b>`
+ v_xad_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`
+ v_xnor_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
+ v_xor_b32_e64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`
VOP3P
------------------------
+-----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **SRC2** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_accvgpr_read_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc>`
- v_accvgpr_write_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_13>`, :ref:`src<amdgpu_synid_gfx90a_src_6>`
- v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot4_i32_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot8_i32_i4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`u4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`u4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_mfma_f32_16x16x16bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x16f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x1f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x2bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x4bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x4f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x4f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_16x16x8bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x1f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_18>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_9>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x2bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_18>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_9>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x2f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x4bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x4bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_18>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_9>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x4f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_18>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_9>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x8bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_32x32x8f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_4x4x1f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_4x4x2bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_4x4x4bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f32_4x4x4f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f64_16x16x4f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_19>`::ref:`f64x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_10>`::ref:`f64x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_f64_4x4x4f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_1>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_4>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_11>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_i32_16x16x16i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_i32_16x16x4i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_i32_32x32x4i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_18>`::ref:`i32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_9>`::ref:`i32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_i32_32x32x8i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_17>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_8>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_mfma_i32_4x4x4i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_2>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_5>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_7>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
- v_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_add_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_add_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_add_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_fma_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`, :ref:`src2<amdgpu_synid_gfx90a_src_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_fma_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>`, :ref:`src2<amdgpu_synid_gfx90a_src_5>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_mad_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_mad_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`, :ref:`src2<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_max_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_max_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_max_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_min_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_min_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_min_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_mov_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_mul_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_mul_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_15>`, :ref:`src0<amdgpu_synid_gfx90a_src_5>`, :ref:`src1<amdgpu_synid_gfx90a_src_5>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
- v_pk_sub_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
- v_pk_sub_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_14>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_accvgpr_read_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc<amdgpu_synid_gfx90a_vsrc_1027ca>`
+ v_accvgpr_write_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_78dd0a>`, :ref:`src<amdgpu_synid_gfx90a_src_d578c4>`
+ v_dot2_f32_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`f16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot2_i32_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`i16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot2_u32_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_i32_i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot4_u32_u8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot8_i32_i4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`i32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_dot8_u32_u4 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u4x8<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`u32<amdgpu_synid_gfx90a_type_deviation>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mix_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mixhi_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_fma_mixlo_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`::ref:`fx<amdgpu_synid_gfx90a_fx_operand>` :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_mfma_f32_16x16x16bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x16f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x1f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x2bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x4bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x4f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x4f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_16x16x8bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x1f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8c77d4>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_6cfc4e>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x2bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8c77d4>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_6cfc4e>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x2f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x4bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x4bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_8c77d4>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_6cfc4e>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x4f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8c77d4>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_6cfc4e>`::ref:`f32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x8bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_32x32x8f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`f32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_4x4x1f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`f32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_4x4x2bf16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`bf16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_4x4x4bf16_1k :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`bf16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f32_4x4x4f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f16x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`f32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f64_16x16x4f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_c8d317>`::ref:`f64x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_e5cc81>`::ref:`f64x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_f64_4x4x4f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_9ad749>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_64ea89>`::ref:`f64<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_i32_16x16x16i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_i32_16x16x4i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_i32_32x32x4i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_8c77d4>`::ref:`i32x32<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_6cfc4e>`::ref:`i32x32<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_i32_32x32x8i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_d6f4bd>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_a578ba>`::ref:`i32x16<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_mfma_i32_4x4x4i8 :ref:`vdst<amdgpu_synid_gfx90a_vdst_180bef>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc0<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_be4895>`::ref:`i8x4<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src2<amdgpu_synid_gfx90a_src_af08be>`::ref:`i32x4<amdgpu_synid_gfx90a_type_deviation>` :ref:`cbsz<amdgpu_synid_cbsz>` :ref:`abid<amdgpu_synid_abid>` :ref:`blgp<amdgpu_synid_blgp>`
+ v_pk_add_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_add_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_add_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_add_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_ashrrev_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_fma_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d578c4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_fma_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src2<amdgpu_synid_gfx90a_src_f73668>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_lshlrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_lshrrev_b16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`u16x2<amdgpu_synid_gfx90a_type_deviation>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_mad_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_mad_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_max_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_max_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_max_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_min_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_min_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_min_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_mov_b32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_mul_f16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`neg_lo<amdgpu_synid_neg_lo>` :ref:`neg_hi<amdgpu_synid_neg_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_mul_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_bdb32f>`, :ref:`src0<amdgpu_synid_gfx90a_src_f73668>`, :ref:`src1<amdgpu_synid_gfx90a_src_f73668>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_mul_lo_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>`
+ v_pk_sub_i16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
+ v_pk_sub_u16 :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>` :ref:`op_sel<amdgpu_synid_op_sel>` :ref:`op_sel_hi<amdgpu_synid_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
VOPC
------------------------
+----
.. parsed-literal::
**INSTRUCTION** **DST** **SRC0** **SRC1** **MODIFIERS**
\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
- v_cmp_class_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmp_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_class_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmp_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_class_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmp_eq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_eq_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_eq_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_eq_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_f_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_f_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_f_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_f_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_f_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_f_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_ge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_ge_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_ge_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ge_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_gt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_gt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_gt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_gt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_le_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_le_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_le_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_le_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_lg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_lt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_lt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_lt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_lt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_ne_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_ne_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ne_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_neq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_neq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_neq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_nge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_ngt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ngt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_ngt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_nle_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nle_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nle_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_nlg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_nlt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_nlt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_o_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_o_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_o_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_t_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_t_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_t_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_t_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_t_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_tru_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_tru_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_tru_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmp_u_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_u_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmp_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_2>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmp_u_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_class_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmpx_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_class_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmpx_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_class_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
- v_cmpx_eq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_eq_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_eq_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_eq_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_f_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_f_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_f_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_f_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_f_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_f_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_ge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_ge_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_ge_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ge_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_gt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_gt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_gt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_gt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_le_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_le_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_le_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_le_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_lg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_lt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_lt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_lt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_lt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_ne_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_ne_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ne_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_neq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_neq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_neq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_nge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_ngt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ngt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_ngt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_nle_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nle_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nle_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_nlg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_nlt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_nlt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_o_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_o_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_o_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_t_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_t_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_t_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_3>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_t_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_4>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_t_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_tru_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_tru_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_tru_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
- v_cmpx_u_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_u_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_1>`
- v_cmpx_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_6>`, :ref:`src0<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>`, :ref:`src1<amdgpu_synid_gfx90a_src_1>`::ref:`m<amdgpu_synid_gfx90a_m_1>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
- v_cmpx_u_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_2>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_2>`
+ v_cmp_class_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmp_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_class_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmp_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_class_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmp_eq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_eq_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_eq_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_eq_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_f_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_f_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_f_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_f_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_f_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_f_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_ge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_ge_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_ge_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ge_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_gt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_gt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_gt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_gt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_le_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_le_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_le_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_le_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_lg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_lt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_lt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_lt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_lt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_ne_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_ne_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ne_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_neq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_neq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_neq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_nge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_ngt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ngt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_ngt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_nle_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nle_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nle_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_nlg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_nlt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_nlt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_o_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_o_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_o_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_t_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_t_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_t_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_t_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_t_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_tru_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_tru_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_tru_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmp_u_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_u_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmp_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_718cc4>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmp_u_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_class_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmpx_class_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_class_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmpx_class_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_class_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`::ref:`b32<amdgpu_synid_gfx90a_type_deviation>`
+ v_cmpx_eq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_eq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_eq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_eq_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_eq_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_eq_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_eq_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_eq_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_eq_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_eq_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_f_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_f_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_f_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_f_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_f_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_f_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_f_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_f_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_f_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_f_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_ge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_ge_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ge_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ge_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_ge_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ge_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ge_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ge_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_gt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_gt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_gt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_gt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_gt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_gt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_gt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_gt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_gt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_gt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_le_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_le_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_le_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_le_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_le_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_le_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_le_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_le_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_le_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_le_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_lg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_lt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_lt_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lt_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lt_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_lt_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lt_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_lt_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_lt_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_ne_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ne_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ne_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_ne_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ne_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ne_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ne_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_neq_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_neq_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_neq_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_neq_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_neq_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_nge_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nge_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nge_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nge_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nge_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_ngt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ngt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ngt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_ngt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_ngt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_nle_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nle_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nle_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nle_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nle_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_nlg_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nlg_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlg_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nlg_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlg_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_nlt_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nlt_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlt_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_nlt_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_nlt_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_o_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_o_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_o_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_o_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_o_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_t_i16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_t_i16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_i32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_t_i32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_i64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_t_u16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_4de5c6>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_t_u16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d95796>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_u32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_t_u32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_254bcb>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_t_u64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_tru_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_tru_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_tru_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_tru_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_tru_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
+ v_cmpx_u_f16 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_u_f16_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_u_f32 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_e1561c>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_6802ce>`
+ v_cmpx_u_f32_sdwa :ref:`sdst<amdgpu_synid_gfx90a_sdst_a319e6>`, :ref:`src0<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>`, :ref:`src1<amdgpu_synid_gfx90a_src_d578c4>`::ref:`m<amdgpu_synid_gfx90a_m_f5d306>` :ref:`src0_sel<amdgpu_synid_src0_sel>` :ref:`src1_sel<amdgpu_synid_src1_sel>`
+ v_cmpx_u_f64 :ref:`vcc<amdgpu_synid_gfx90a_vcc>`, :ref:`src0<amdgpu_synid_gfx90a_src_56ed80>`, :ref:`vsrc1<amdgpu_synid_gfx90a_vsrc_fd235e>`
.. |---| unicode:: U+02014 .. em dash
@@ -1993,111 +1993,110 @@ VOPC
gfx90a_fx_operand
gfx90a_hwreg
gfx90a_imask
- gfx90a_imm16
- gfx90a_imm16_1
- gfx90a_imm16_2
+ gfx90a_imm16_73139a
+ gfx90a_imm16_a04fb3
gfx90a_label
- gfx90a_m
- gfx90a_m_1
+ gfx90a_m_254bcb
+ gfx90a_m_f5d306
gfx90a_msg
- gfx90a_opt
+ gfx90a_opt_0d447d
+ gfx90a_opt_847aed
gfx90a_probe
- gfx90a_saddr
- gfx90a_saddr_1
- gfx90a_sbase
- gfx90a_sbase_1
- gfx90a_sbase_2
- gfx90a_sdata
- gfx90a_sdata_1
- gfx90a_sdata_2
- gfx90a_sdata_3
- gfx90a_sdata_4
- gfx90a_sdata_5
- gfx90a_sdst
- gfx90a_sdst_1
- gfx90a_sdst_2
- gfx90a_sdst_3
- gfx90a_sdst_4
- gfx90a_sdst_5
- gfx90a_sdst_6
- gfx90a_sdst_7
- gfx90a_simm32
- gfx90a_simm32_1
- gfx90a_simm32_2
- gfx90a_soffset
- gfx90a_soffset_1
- gfx90a_soffset_2
- gfx90a_src
- gfx90a_src_1
- gfx90a_src_10
- gfx90a_src_11
- gfx90a_src_2
- gfx90a_src_3
- gfx90a_src_4
- gfx90a_src_5
- gfx90a_src_6
- gfx90a_src_7
- gfx90a_src_8
- gfx90a_src_9
- gfx90a_srsrc
- gfx90a_srsrc_1
+ gfx90a_saddr_6060e5
+ gfx90a_saddr_a37373
+ gfx90a_sbase_010ce0
+ gfx90a_sbase_044055
+ gfx90a_sbase_0cd545
+ gfx90a_sdata_595c25
+ gfx90a_sdata_7cbd60
+ gfx90a_sdata_aefe00
+ gfx90a_sdata_c6aec1
+ gfx90a_sdata_e9f591
+ gfx90a_sdata_eb6f2a
+ gfx90a_sdst_06b266
+ gfx90a_sdst_0804b1
+ gfx90a_sdst_362c37
+ gfx90a_sdst_3bc700
+ gfx90a_sdst_59204c
+ gfx90a_sdst_718cc4
+ gfx90a_sdst_94342d
+ gfx90a_sdst_a319e6
+ gfx90a_simm32_6f0844
+ gfx90a_simm32_a3e80c
+ gfx90a_simm32_be0c1c
+ gfx90a_soffset_4318ca
+ gfx90a_soffset_8a17c8
+ gfx90a_soffset_ba92ce
+ gfx90a_src_4de5c6
+ gfx90a_src_56ed80
+ gfx90a_src_64ea89
+ gfx90a_src_6cfc4e
+ gfx90a_src_a578ba
+ gfx90a_src_af08be
+ gfx90a_src_d578c4
+ gfx90a_src_d95796
+ gfx90a_src_e1561c
+ gfx90a_src_e5cc81
+ gfx90a_src_f73668
+ gfx90a_srsrc_79ffcd
+ gfx90a_srsrc_e73d16
gfx90a_ssamp
- gfx90a_ssrc
- gfx90a_ssrc_1
- gfx90a_ssrc_2
- gfx90a_ssrc_3
- gfx90a_ssrc_4
- gfx90a_ssrc_5
- gfx90a_ssrc_6
- gfx90a_ssrc_7
- gfx90a_ssrc_8
+ gfx90a_ssrc_4db4a9
+ gfx90a_ssrc_57838b
+ gfx90a_ssrc_595c25
+ gfx90a_ssrc_65f041
+ gfx90a_ssrc_aee59c
+ gfx90a_ssrc_c31902
+ gfx90a_ssrc_c5d631
+ gfx90a_ssrc_c8a322
+ gfx90a_ssrc_e9f591
gfx90a_type_deviation
- gfx90a_vaddr
- gfx90a_vaddr_1
- gfx90a_vaddr_2
- gfx90a_vaddr_3
- gfx90a_vaddr_4
- gfx90a_vaddr_5
+ gfx90a_vaddr_0212e3
+ gfx90a_vaddr_5d0b42
+ gfx90a_vaddr_76b997
+ gfx90a_vaddr_9f7133
+ gfx90a_vaddr_b73dc0
+ gfx90a_vaddr_f20ee4
gfx90a_vcc
- gfx90a_vdata
- gfx90a_vdata0
- gfx90a_vdata0_1
- gfx90a_vdata1
- gfx90a_vdata1_1
- gfx90a_vdata_1
- gfx90a_vdata_10
- gfx90a_vdata_2
- gfx90a_vdata_3
- gfx90a_vdata_4
- gfx90a_vdata_5
- gfx90a_vdata_6
- gfx90a_vdata_7
- gfx90a_vdata_8
- gfx90a_vdata_9
- gfx90a_vdst
- gfx90a_vdst_1
- gfx90a_vdst_10
- gfx90a_vdst_11
- gfx90a_vdst_12
- gfx90a_vdst_13
- gfx90a_vdst_14
- gfx90a_vdst_15
- gfx90a_vdst_16
- gfx90a_vdst_17
- gfx90a_vdst_18
- gfx90a_vdst_19
- gfx90a_vdst_2
- gfx90a_vdst_3
- gfx90a_vdst_4
- gfx90a_vdst_5
- gfx90a_vdst_6
- gfx90a_vdst_7
- gfx90a_vdst_8
- gfx90a_vdst_9
- gfx90a_vsrc
- gfx90a_vsrc_1
- gfx90a_vsrc_2
- gfx90a_vsrc_3
- gfx90a_vsrc_4
- gfx90a_vsrc_5
+ gfx90a_vdata0_9ad749
+ gfx90a_vdata0_be4895
+ gfx90a_vdata1_9ad749
+ gfx90a_vdata1_be4895
+ gfx90a_vdata_2a60db
+ gfx90a_vdata_2d0375
+ gfx90a_vdata_848ff7
+ gfx90a_vdata_8e9b87
+ gfx90a_vdata_929b59
+ gfx90a_vdata_9ad749
+ gfx90a_vdata_a5f23e
+ gfx90a_vdata_af2725
+ gfx90a_vdata_be4895
+ gfx90a_vdata_ca6e5f
+ gfx90a_vdata_cfb402
+ gfx90a_vdst_0f48d1
+ gfx90a_vdst_180bef
+ gfx90a_vdst_260aca
+ gfx90a_vdst_5258b4
+ gfx90a_vdst_69a144
+ gfx90a_vdst_78dd0a
+ gfx90a_vdst_7c9848
+ gfx90a_vdst_89680f
+ gfx90a_vdst_8c77d4
+ gfx90a_vdst_a32035
+ gfx90a_vdst_bdb32f
+ gfx90a_vdst_c8d317
+ gfx90a_vdst_c8ee02
+ gfx90a_vdst_d0c0cb
+ gfx90a_vdst_d6f4bd
+ gfx90a_vdst_d8236e
+ gfx90a_vdst_e2898f
+ gfx90a_vdst_ef6c94
+ gfx90a_vdst_f47b9b
+ gfx90a_vdst_fa7dbd
+ gfx90a_vsrc_1027ca
+ gfx90a_vsrc_6802ce
+ gfx90a_vsrc_9ad749
+ gfx90a_vsrc_be4895
+ gfx90a_vsrc_e016a1
+ gfx90a_vsrc_fd235e
gfx90a_waitcnt
diff --git a/llvm/docs/AMDGPU/gfx90a_hwreg.rst b/llvm/docs/AMDGPU/gfx90a_hwreg.rst
index 6e100b59f08db..e5e862507acdf 100644
--- a/llvm/docs/AMDGPU/gfx90a_hwreg.rst
+++ b/llvm/docs/AMDGPU/gfx90a_hwreg.rst
@@ -41,18 +41,22 @@ or :ref:`absolute expressions<amdgpu_synid_absolute_expression>`.
Defined register *names* include:
- =================== ==========================================
- Name Description
- =================== ==========================================
- HW_REG_MODE Shader writeable mode bits.
- HW_REG_STATUS Shader read-only status.
- HW_REG_TRAPSTS Trap status.
- HW_REG_HW_ID Id of wave, simd, compute unit, etc.
- HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
- HW_REG_LDS_ALLOC Per-wave LDS allocation.
- HW_REG_IB_STS Counters of outstanding instructions.
- HW_REG_SH_MEM_BASES Memory aperture.
- =================== ==========================================
+ ============================== ==========================================
+ Name Description
+ ============================== ==========================================
+ HW_REG_MODE Shader writeable mode bits.
+ HW_REG_STATUS Shader read-only status.
+ HW_REG_TRAPSTS Trap status.
+ HW_REG_HW_ID Id of wave, simd, compute unit, etc.
+ HW_REG_GPR_ALLOC Per-wave SGPR and VGPR allocation.
+ HW_REG_LDS_ALLOC Per-wave LDS allocation.
+ HW_REG_IB_STS Counters of outstanding instructions.
+ HW_REG_SH_MEM_BASES Memory aperture.
+ HW_REG_TBA_LO tba_lo register.
+ HW_REG_TBA_HI tba_hi register.
+ HW_REG_TMA_LO tma_lo register.
+ HW_REG_TMA_HI tma_hi register.
+ ============================== ==========================================
Examples:
diff --git a/llvm/docs/AMDGPU/gfx90a_imm16_2.rst b/llvm/docs/AMDGPU/gfx90a_imm16_2.rst
deleted file mode 100644
index 17fce930d9c6d..0000000000000
--- a/llvm/docs/AMDGPU/gfx90a_imm16_2.rst
+++ /dev/null
@@ -1,13 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx90a_imm16_2:
-
-imm16
-=====
-
-A 16-bit :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range -32768..65535.
diff --git a/llvm/docs/AMDGPU/gfx90a_imm16.rst b/llvm/docs/AMDGPU/gfx90a_imm16_73139a.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_imm16.rst
rename to llvm/docs/AMDGPU/gfx90a_imm16_73139a.rst
index 8d43cf4af0676..4d205e85d2967 100644
--- a/llvm/docs/AMDGPU/gfx90a_imm16.rst
+++ b/llvm/docs/AMDGPU/gfx90a_imm16_73139a.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_imm16:
+.. _amdgpu_synid_gfx90a_imm16_73139a:
imm16
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_imm16_1.rst b/llvm/docs/AMDGPU/gfx90a_imm16_a04fb3.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_imm16_1.rst
rename to llvm/docs/AMDGPU/gfx90a_imm16_a04fb3.rst
index f270aa4338593..0b2724ed4445e 100644
--- a/llvm/docs/AMDGPU/gfx90a_imm16_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_imm16_a04fb3.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_imm16_1:
+.. _amdgpu_synid_gfx90a_imm16_a04fb3:
imm16
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_m.rst b/llvm/docs/AMDGPU/gfx90a_m_254bcb.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_m.rst
rename to llvm/docs/AMDGPU/gfx90a_m_254bcb.rst
index 501379d015352..2273971b62e26 100644
--- a/llvm/docs/AMDGPU/gfx90a_m.rst
+++ b/llvm/docs/AMDGPU/gfx90a_m_254bcb.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_m:
+.. _amdgpu_synid_gfx90a_m_254bcb:
m
=
diff --git a/llvm/docs/AMDGPU/gfx90a_m_1.rst b/llvm/docs/AMDGPU/gfx90a_m_f5d306.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_m_1.rst
rename to llvm/docs/AMDGPU/gfx90a_m_f5d306.rst
index 0d1dd6fefc793..0843c4fed876d 100644
--- a/llvm/docs/AMDGPU/gfx90a_m_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_m_f5d306.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_m_1:
+.. _amdgpu_synid_gfx90a_m_f5d306:
m
=
diff --git a/llvm/docs/AMDGPU/gfx90a_msg.rst b/llvm/docs/AMDGPU/gfx90a_msg.rst
index 37f945464e58a..f3e978c17a6b4 100644
--- a/llvm/docs/AMDGPU/gfx90a_msg.rst
+++ b/llvm/docs/AMDGPU/gfx90a_msg.rst
@@ -67,7 +67,6 @@ Each message type supports specific operations:
MSG_GET_DOORBELL 10 \- \- \-
MSG_SYSMSG 15 SYSMSG_OP_ECC_ERR_INTERRUPT 1 \-
\ SYSMSG_OP_REG_RD 2 \-
- \ SYSMSG_OP_HOST_TRAP_ACK 3 \-
\ SYSMSG_OP_TTRACE_PC 4 \-
====================== ========== ============================== ============ ==========
diff --git a/llvm/docs/AMDGPU/gfx90a_opt_0d447d.rst b/llvm/docs/AMDGPU/gfx90a_opt_0d447d.rst
new file mode 100644
index 0000000000000..f6d149e259880
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx90a_opt_0d447d.rst
@@ -0,0 +1,13 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx90a_opt_0d447d:
+
+opt
+===
+
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
diff --git a/llvm/docs/AMDGPU/gfx90a_opt.rst b/llvm/docs/AMDGPU/gfx90a_opt_847aed.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_opt.rst
rename to llvm/docs/AMDGPU/gfx90a_opt_847aed.rst
index dd035b8149e21..f2db7ed49f5b5 100644
--- a/llvm/docs/AMDGPU/gfx90a_opt.rst
+++ b/llvm/docs/AMDGPU/gfx90a_opt_847aed.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_opt:
+.. _amdgpu_synid_gfx90a_opt_847aed:
opt
===
diff --git a/llvm/docs/AMDGPU/gfx90a_saddr_1.rst b/llvm/docs/AMDGPU/gfx90a_saddr_6060e5.rst
similarity index 80%
rename from llvm/docs/AMDGPU/gfx90a_saddr_1.rst
rename to llvm/docs/AMDGPU/gfx90a_saddr_6060e5.rst
index 34d8ad7f66c79..0e191fa4cd7e4 100644
--- a/llvm/docs/AMDGPU/gfx90a_saddr_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_saddr_6060e5.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_saddr_1:
+.. _amdgpu_synid_gfx90a_saddr_6060e5:
saddr
=====
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
-Either this operand or :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_3>` must be set to :ref:`off<amdgpu_synid_off>`.
+Either this operand or :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_76b997>` must be set to :ref:`off<amdgpu_synid_off>`.
*Size:* 1 dword.
diff --git a/llvm/docs/AMDGPU/gfx90a_saddr.rst b/llvm/docs/AMDGPU/gfx90a_saddr_a37373.rst
similarity index 82%
rename from llvm/docs/AMDGPU/gfx90a_saddr.rst
rename to llvm/docs/AMDGPU/gfx90a_saddr_a37373.rst
index 4e4c84784e9d8..5a0398e46b3a4 100644
--- a/llvm/docs/AMDGPU/gfx90a_saddr.rst
+++ b/llvm/docs/AMDGPU/gfx90a_saddr_a37373.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_saddr:
+.. _amdgpu_synid_gfx90a_saddr_a37373:
saddr
=====
An optional 64-bit flat global address. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
-See :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>` for description of available addressing modes.
+See :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` for description of available addressing modes.
*Size:* 2 dwords.
diff --git a/llvm/docs/AMDGPU/gfx90a_sbase_1.rst b/llvm/docs/AMDGPU/gfx90a_sbase_010ce0.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_sbase_1.rst
rename to llvm/docs/AMDGPU/gfx90a_sbase_010ce0.rst
index 94f45c157b8dd..b652c4b035fe0 100644
--- a/llvm/docs/AMDGPU/gfx90a_sbase_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sbase_010ce0.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sbase_1:
+.. _amdgpu_synid_gfx90a_sbase_010ce0:
sbase
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sbase.rst b/llvm/docs/AMDGPU/gfx90a_sbase_044055.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sbase.rst
rename to llvm/docs/AMDGPU/gfx90a_sbase_044055.rst
index 669b8f2b8fc6d..9b642428e58fa 100644
--- a/llvm/docs/AMDGPU/gfx90a_sbase.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sbase_044055.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sbase:
+.. _amdgpu_synid_gfx90a_sbase_044055:
sbase
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sbase_2.rst b/llvm/docs/AMDGPU/gfx90a_sbase_0cd545.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_sbase_2.rst
rename to llvm/docs/AMDGPU/gfx90a_sbase_0cd545.rst
index 75f00f38e100c..064a3b7827da3 100644
--- a/llvm/docs/AMDGPU/gfx90a_sbase_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sbase_0cd545.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sbase_2:
+.. _amdgpu_synid_gfx90a_sbase_0cd545:
sbase
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdata_3.rst b/llvm/docs/AMDGPU/gfx90a_sdata_595c25.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sdata_3.rst
rename to llvm/docs/AMDGPU/gfx90a_sdata_595c25.rst
index 9d838f5605c22..3df59764d51a7 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdata_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdata_595c25.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdata_3:
+.. _amdgpu_synid_gfx90a_sdata_595c25:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdata_5.rst b/llvm/docs/AMDGPU/gfx90a_sdata_7cbd60.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_sdata_5.rst
rename to llvm/docs/AMDGPU/gfx90a_sdata_7cbd60.rst
index 7554d386093f0..efcfb87ad2475 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdata_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdata_7cbd60.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdata_5:
+.. _amdgpu_synid_gfx90a_sdata_7cbd60:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdata.rst b/llvm/docs/AMDGPU/gfx90a_sdata_aefe00.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_sdata.rst
rename to llvm/docs/AMDGPU/gfx90a_sdata_aefe00.rst
index 80d59338c962f..2022842721d64 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdata.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdata_aefe00.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdata:
+.. _amdgpu_synid_gfx90a_sdata_aefe00:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdata_2.rst b/llvm/docs/AMDGPU/gfx90a_sdata_c6aec1.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sdata_2.rst
rename to llvm/docs/AMDGPU/gfx90a_sdata_c6aec1.rst
index b0bad7c265159..626372fdc7639 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdata_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdata_c6aec1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdata_2:
+.. _amdgpu_synid_gfx90a_sdata_c6aec1:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdata_4.rst b/llvm/docs/AMDGPU/gfx90a_sdata_e9f591.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sdata_4.rst
rename to llvm/docs/AMDGPU/gfx90a_sdata_e9f591.rst
index fd7f62b7c4c16..0e07d83de4dbf 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdata_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdata_e9f591.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdata_4:
+.. _amdgpu_synid_gfx90a_sdata_e9f591:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdata_1.rst b/llvm/docs/AMDGPU/gfx90a_sdata_eb6f2a.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_sdata_1.rst
rename to llvm/docs/AMDGPU/gfx90a_sdata_eb6f2a.rst
index 34df71ebfdaa2..fa34d1f7e2c52 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdata_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdata_eb6f2a.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdata_1:
+.. _amdgpu_synid_gfx90a_sdata_eb6f2a:
sdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_5.rst b/llvm/docs/AMDGPU/gfx90a_sdst_06b266.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_sdst_5.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_06b266.rst
index a2ae6920e71d1..7997be6ef6284 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_06b266.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_5:
+.. _amdgpu_synid_gfx90a_sdst_06b266:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_3.rst b/llvm/docs/AMDGPU/gfx90a_sdst_0804b1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_sdst_3.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_0804b1.rst
index 180f4bb68e153..89e165a4b5a1d 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_0804b1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_3:
+.. _amdgpu_synid_gfx90a_sdst_0804b1:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_4.rst b/llvm/docs/AMDGPU/gfx90a_sdst_362c37.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_sdst_4.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_362c37.rst
index d183c0b2f1209..671388395fa04 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_362c37.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_4:
+.. _amdgpu_synid_gfx90a_sdst_362c37:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_1.rst b/llvm/docs/AMDGPU/gfx90a_sdst_3bc700.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_sdst_1.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_3bc700.rst
index cfaedb8befa00..6217b8d1b6d92 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_3bc700.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_1:
+.. _amdgpu_synid_gfx90a_sdst_3bc700:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_7.rst b/llvm/docs/AMDGPU/gfx90a_sdst_59204c.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_sdst_7.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_59204c.rst
index 079d3bea33c59..f414cc6e4773c 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_7.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_59204c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_7:
+.. _amdgpu_synid_gfx90a_sdst_59204c:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_2.rst b/llvm/docs/AMDGPU/gfx90a_sdst_718cc4.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sdst_2.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_718cc4.rst
index 58d3d7e598ec1..1a3c1288d566a 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_718cc4.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_2:
+.. _amdgpu_synid_gfx90a_sdst_718cc4:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst.rst b/llvm/docs/AMDGPU/gfx90a_sdst_94342d.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sdst.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_94342d.rst
index c1980515a1a09..90e9b158526d8 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_94342d.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst:
+.. _amdgpu_synid_gfx90a_sdst_94342d:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_sdst_6.rst b/llvm/docs/AMDGPU/gfx90a_sdst_a319e6.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_sdst_6.rst
rename to llvm/docs/AMDGPU/gfx90a_sdst_a319e6.rst
index 8a8fddc9bee35..4ae61f5244153 100644
--- a/llvm/docs/AMDGPU/gfx90a_sdst_6.rst
+++ b/llvm/docs/AMDGPU/gfx90a_sdst_a319e6.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_sdst_6:
+.. _amdgpu_synid_gfx90a_sdst_a319e6:
sdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_simm32_2.rst b/llvm/docs/AMDGPU/gfx90a_simm32_6f0844.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_simm32_2.rst
rename to llvm/docs/AMDGPU/gfx90a_simm32_6f0844.rst
index 63b8ad3d11014..af74051a446dd 100644
--- a/llvm/docs/AMDGPU/gfx90a_simm32_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_simm32_6f0844.rst
@@ -5,10 +5,10 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_simm32_2:
+.. _amdgpu_synid_gfx90a_simm32_6f0844:
simm32
======
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
-The value is converted to *f32* as described :ref:`here<amdgpu_synid_fp_conv>`.
+The value is converted to *f32* as described :ref:`here<amdgpu_synid_conv>`.
diff --git a/llvm/docs/AMDGPU/gfx90a_simm32.rst b/llvm/docs/AMDGPU/gfx90a_simm32_a3e80c.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_simm32.rst
rename to llvm/docs/AMDGPU/gfx90a_simm32_a3e80c.rst
index cb0710fdeab54..a35b88a0158ab 100644
--- a/llvm/docs/AMDGPU/gfx90a_simm32.rst
+++ b/llvm/docs/AMDGPU/gfx90a_simm32_a3e80c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_simm32:
+.. _amdgpu_synid_gfx90a_simm32_a3e80c:
simm32
======
diff --git a/llvm/docs/AMDGPU/gfx90a_simm32_1.rst b/llvm/docs/AMDGPU/gfx90a_simm32_be0c1c.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_simm32_1.rst
rename to llvm/docs/AMDGPU/gfx90a_simm32_be0c1c.rst
index dbf685350326c..c305eb1505cdf 100644
--- a/llvm/docs/AMDGPU/gfx90a_simm32_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_simm32_be0c1c.rst
@@ -5,10 +5,10 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_simm32_1:
+.. _amdgpu_synid_gfx90a_simm32_be0c1c:
simm32
======
A :ref:`floating-point_number<amdgpu_synid_floating-point_number>`, an :ref:`integer_number<amdgpu_synid_integer_number>`, or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`.
-The value is converted to *f16* as described :ref:`here<amdgpu_synid_fp_conv>`.
+The value is converted to *f16* as described :ref:`here<amdgpu_synid_conv>`.
diff --git a/llvm/docs/AMDGPU/gfx90a_soffset.rst b/llvm/docs/AMDGPU/gfx90a_soffset_4318ca.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_soffset.rst
rename to llvm/docs/AMDGPU/gfx90a_soffset_4318ca.rst
index 1a4623404c222..9cd1bb913eba4 100644
--- a/llvm/docs/AMDGPU/gfx90a_soffset.rst
+++ b/llvm/docs/AMDGPU/gfx90a_soffset_4318ca.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_soffset:
+.. _amdgpu_synid_gfx90a_soffset_4318ca:
soffset
=======
diff --git a/llvm/docs/AMDGPU/gfx90a_soffset_1.rst b/llvm/docs/AMDGPU/gfx90a_soffset_8a17c8.rst
similarity index 74%
rename from llvm/docs/AMDGPU/gfx90a_soffset_1.rst
rename to llvm/docs/AMDGPU/gfx90a_soffset_8a17c8.rst
index 13728978887e1..083cf8f57d03a 100644
--- a/llvm/docs/AMDGPU/gfx90a_soffset_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_soffset_8a17c8.rst
@@ -5,16 +5,18 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_soffset_1:
+.. _amdgpu_synid_gfx90a_soffset_8a17c8:
soffset
=======
-An offset added to the base address to get memory address.
+An offset from the base address.
* If offset is specified as a register, it supplies an unsigned byte offset.
* If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
+Note that an *immediate* offset may be specified using either :ref:`simm21<amdgpu_synid_simm21>` operand or :ref:`offset21s<amdgpu_synid_smem_offset21s>` modifier, but not both.
+
*Size:* 1 dword.
*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`
diff --git a/llvm/docs/AMDGPU/gfx90a_soffset_2.rst b/llvm/docs/AMDGPU/gfx90a_soffset_ba92ce.rst
similarity index 64%
rename from llvm/docs/AMDGPU/gfx90a_soffset_2.rst
rename to llvm/docs/AMDGPU/gfx90a_soffset_ba92ce.rst
index e94fda005b2a3..603101f5c7973 100644
--- a/llvm/docs/AMDGPU/gfx90a_soffset_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_soffset_ba92ce.rst
@@ -5,12 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_soffset_2:
+.. _amdgpu_synid_gfx90a_soffset_ba92ce:
soffset
=======
-An unsigned 20-bit offset added to the base address to get memory address.
+An unsigned offset from the base address. My be specified as either a register or a 20-bit immediate.
+
+Note that an *immediate* offset may be specified using either :ref:`uimm20<amdgpu_synid_uimm20>` operand or :ref:`offset20u<amdgpu_synid_smem_offset20u>` modifier, but not both.
*Size:* 1 dword.
diff --git a/llvm/docs/AMDGPU/gfx90a_src_3.rst b/llvm/docs/AMDGPU/gfx90a_src_4de5c6.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_src_3.rst
rename to llvm/docs/AMDGPU/gfx90a_src_4de5c6.rst
index 687f53ac20cec..4628dfc854605 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_4de5c6.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_3:
+.. _amdgpu_synid_gfx90a_src_4de5c6:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_2.rst b/llvm/docs/AMDGPU/gfx90a_src_56ed80.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_src_2.rst
rename to llvm/docs/AMDGPU/gfx90a_src_56ed80.rst
index f4750b299e133..3dc4e194ad5da 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_56ed80.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_2:
+.. _amdgpu_synid_gfx90a_src_56ed80:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_6.rst b/llvm/docs/AMDGPU/gfx90a_src_6.rst
deleted file mode 100644
index 75faedd0326f7..0000000000000
--- a/llvm/docs/AMDGPU/gfx90a_src_6.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx90a_src_6:
-
-src
-===
-
-Instruction input.
-
-*Size:* 1 dword.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`fconst<amdgpu_synid_fconst>`
diff --git a/llvm/docs/AMDGPU/gfx90a_src_11.rst b/llvm/docs/AMDGPU/gfx90a_src_64ea89.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_src_11.rst
rename to llvm/docs/AMDGPU/gfx90a_src_64ea89.rst
index cb1ea4b97be5a..cd83743cef9cb 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_11.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_64ea89.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_11:
+.. _amdgpu_synid_gfx90a_src_64ea89:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_9.rst b/llvm/docs/AMDGPU/gfx90a_src_6cfc4e.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_src_9.rst
rename to llvm/docs/AMDGPU/gfx90a_src_6cfc4e.rst
index d0c9bfb291407..6809e40635750 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_9.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_6cfc4e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_9:
+.. _amdgpu_synid_gfx90a_src_6cfc4e:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_8.rst b/llvm/docs/AMDGPU/gfx90a_src_a578ba.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_src_8.rst
rename to llvm/docs/AMDGPU/gfx90a_src_a578ba.rst
index 8cfa04e04d91d..d978255d52062 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_8.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_a578ba.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_8:
+.. _amdgpu_synid_gfx90a_src_a578ba:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_7.rst b/llvm/docs/AMDGPU/gfx90a_src_af08be.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_src_7.rst
rename to llvm/docs/AMDGPU/gfx90a_src_af08be.rst
index d63987f499ec6..beb8af66c54fe 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_7.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_af08be.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_7:
+.. _amdgpu_synid_gfx90a_src_af08be:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_1.rst b/llvm/docs/AMDGPU/gfx90a_src_d578c4.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_src_1.rst
rename to llvm/docs/AMDGPU/gfx90a_src_d578c4.rst
index a939cecc6796d..1c87a89404d25 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_d578c4.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_1:
+.. _amdgpu_synid_gfx90a_src_d578c4:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_4.rst b/llvm/docs/AMDGPU/gfx90a_src_d95796.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_src_4.rst
rename to llvm/docs/AMDGPU/gfx90a_src_d95796.rst
index ec6580d90b739..b413f6ff8bddc 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_d95796.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_4:
+.. _amdgpu_synid_gfx90a_src_d95796:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src.rst b/llvm/docs/AMDGPU/gfx90a_src_e1561c.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_src.rst
rename to llvm/docs/AMDGPU/gfx90a_src_e1561c.rst
index 56a69b4b8313d..22555d58eca83 100644
--- a/llvm/docs/AMDGPU/gfx90a_src.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_e1561c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src:
+.. _amdgpu_synid_gfx90a_src_e1561c:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_10.rst b/llvm/docs/AMDGPU/gfx90a_src_e5cc81.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_src_10.rst
rename to llvm/docs/AMDGPU/gfx90a_src_e5cc81.rst
index b71f38f2945e3..754fffb524c62 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_10.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_e5cc81.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_10:
+.. _amdgpu_synid_gfx90a_src_e5cc81:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_src_5.rst b/llvm/docs/AMDGPU/gfx90a_src_f73668.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_src_5.rst
rename to llvm/docs/AMDGPU/gfx90a_src_f73668.rst
index ece72dfc7d72d..b38b810d48675 100644
--- a/llvm/docs/AMDGPU/gfx90a_src_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_src_f73668.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_src_5:
+.. _amdgpu_synid_gfx90a_src_f73668:
src
===
diff --git a/llvm/docs/AMDGPU/gfx90a_srsrc.rst b/llvm/docs/AMDGPU/gfx90a_srsrc_79ffcd.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_srsrc.rst
rename to llvm/docs/AMDGPU/gfx90a_srsrc_79ffcd.rst
index 4330c4f5165a4..38188cd77234f 100644
--- a/llvm/docs/AMDGPU/gfx90a_srsrc.rst
+++ b/llvm/docs/AMDGPU/gfx90a_srsrc_79ffcd.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_srsrc:
+.. _amdgpu_synid_gfx90a_srsrc_79ffcd:
srsrc
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_srsrc_1.rst b/llvm/docs/AMDGPU/gfx90a_srsrc_e73d16.rst
similarity index 92%
rename from llvm/docs/AMDGPU/gfx90a_srsrc_1.rst
rename to llvm/docs/AMDGPU/gfx90a_srsrc_e73d16.rst
index 77a94170df2b4..e19c76e04faf6 100644
--- a/llvm/docs/AMDGPU/gfx90a_srsrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_srsrc_e73d16.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_srsrc_1:
+.. _amdgpu_synid_gfx90a_srsrc_e73d16:
srsrc
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_8.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_4db4a9.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_8.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_4db4a9.rst
index cd435b19a71c2..324004f4beefc 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_8.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_4db4a9.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_8:
+.. _amdgpu_synid_gfx90a_ssrc_4db4a9:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_7.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_57838b.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_7.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_57838b.rst
index c4c5c60554b79..fc1d31865e6a9 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_7.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_57838b.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_7:
+.. _amdgpu_synid_gfx90a_ssrc_57838b:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_2.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_595c25.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_2.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_595c25.rst
index b47ed39496efb..8e33ad8494b54 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_595c25.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_2:
+.. _amdgpu_synid_gfx90a_ssrc_595c25:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_5.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_65f041.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_5.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_65f041.rst
index cf95369da31a9..9b5ea14b13632 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_65f041.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_5:
+.. _amdgpu_synid_gfx90a_ssrc_65f041:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_1.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_aee59c.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_1.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_aee59c.rst
index 809f04b8a1a39..3533cae1285be 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_aee59c.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_1:
+.. _amdgpu_synid_gfx90a_ssrc_aee59c:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_4.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_c31902.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_4.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_c31902.rst
index 709278b864ea3..17e71b526e8ad 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_c31902.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_4:
+.. _amdgpu_synid_gfx90a_ssrc_c31902:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_c5d631.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_ssrc.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_c5d631.rst
index c152bb25940eb..b86250cae39d7 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_c5d631.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc:
+.. _amdgpu_synid_gfx90a_ssrc_c5d631:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_6.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_c8a322.rst
similarity index 94%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_6.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_c8a322.rst
index bacb7be2aed36..c3c881fd7a180 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_6.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_c8a322.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_6:
+.. _amdgpu_synid_gfx90a_ssrc_c8a322:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_ssrc_3.rst b/llvm/docs/AMDGPU/gfx90a_ssrc_e9f591.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_ssrc_3.rst
rename to llvm/docs/AMDGPU/gfx90a_ssrc_e9f591.rst
index 759634338e9e6..f238a168e7ac0 100644
--- a/llvm/docs/AMDGPU/gfx90a_ssrc_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_ssrc_e9f591.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_ssrc_3:
+.. _amdgpu_synid_gfx90a_ssrc_e9f591:
ssrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr_0212e3.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_0212e3.rst
new file mode 100644
index 0000000000000..63daa42383136
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx90a_vaddr_0212e3.rst
@@ -0,0 +1,20 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx90a_vaddr_0212e3:
+
+vaddr
+=====
+
+A 64-bit flat global address or a 32-bit offset depending on addressing mode:
+
+* Address = :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` set to :ref:`off<amdgpu_synid_off>`.
+* Address = :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` + :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx90a_saddr_a37373>` is not :ref:`off<amdgpu_synid_off>`.
+
+*Size:* 1 or 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr_2.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_2.rst
deleted file mode 100644
index ce380368eb817..0000000000000
--- a/llvm/docs/AMDGPU/gfx90a_vaddr_2.rst
+++ /dev/null
@@ -1,20 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx90a_vaddr_2:
-
-vaddr
-=====
-
-A 64-bit flat global address or a 32-bit offset depending on addressing mode:
-
-* Address = :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx90a_saddr>` set to :ref:`off<amdgpu_synid_off>`.
-* Address = :ref:`saddr<amdgpu_synid_gfx90a_saddr>` + :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>` + :ref:`offset13s<amdgpu_synid_flat_offset13s>`. :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_2>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx90a_saddr>` is not :ref:`off<amdgpu_synid_off>`.
-
-*Size:* 1 or 2 dwords.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr_4.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_5d0b42.rst
similarity index 66%
rename from llvm/docs/AMDGPU/gfx90a_vaddr_4.rst
rename to llvm/docs/AMDGPU/gfx90a_vaddr_5d0b42.rst
index 5647d4ab33f6a..a3d0ec9a3a631 100644
--- a/llvm/docs/AMDGPU/gfx90a_vaddr_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vaddr_5d0b42.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vaddr_4:
+.. _amdgpu_synid_gfx90a_vaddr_5d0b42:
vaddr
=====
@@ -14,8 +14,8 @@ Image address which includes from one to four dimensional coordinates and other
*Size:* 1, 2, 3, 4, 8 or 16 dwords. Actual size depends on opcode, specific image being handled and :ref:`a16<amdgpu_synid_a16>`.
- Note 1. Image format and dimensions are encoded in the image resource constant but not in the instruction.
+ Note 1. Image format and dimensions are encoded in the image resource constant but not in the instruction.
- Note 2. Actually image address size may vary from 1 to 13 dwords, but assembler currently supports a limited range of register sequences.
+ Note 2. Actually image address size may vary from 1 to 13 dwords, but assembler currently supports a limited range of register sequences.
*Operands:* :ref:`v<amdgpu_synid_v>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr_3.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_76b997.rst
similarity index 75%
rename from llvm/docs/AMDGPU/gfx90a_vaddr_3.rst
rename to llvm/docs/AMDGPU/gfx90a_vaddr_76b997.rst
index 3ad704705b488..cba8da62ec134 100644
--- a/llvm/docs/AMDGPU/gfx90a_vaddr_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vaddr_76b997.rst
@@ -5,14 +5,14 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vaddr_3:
+.. _amdgpu_synid_gfx90a_vaddr_76b997:
vaddr
=====
An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
-Either this operand or :ref:`saddr<amdgpu_synid_gfx90a_saddr_1>` must be set to :ref:`off<amdgpu_synid_off>`.
+Either this operand or :ref:`saddr<amdgpu_synid_gfx90a_saddr_6060e5>` must be set to :ref:`off<amdgpu_synid_off>`.
*Size:* 1 dword.
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr_1.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_9f7133.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vaddr_1.rst
rename to llvm/docs/AMDGPU/gfx90a_vaddr_9f7133.rst
index 163642c0c1361..b576b96de2ff0 100644
--- a/llvm/docs/AMDGPU/gfx90a_vaddr_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vaddr_9f7133.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vaddr_1:
+.. _amdgpu_synid_gfx90a_vaddr_9f7133:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr_5.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_b73dc0.rst
similarity index 96%
rename from llvm/docs/AMDGPU/gfx90a_vaddr_5.rst
rename to llvm/docs/AMDGPU/gfx90a_vaddr_b73dc0.rst
index 19209225c789e..dd0116266c8d9 100644
--- a/llvm/docs/AMDGPU/gfx90a_vaddr_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vaddr_b73dc0.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vaddr_5:
+.. _amdgpu_synid_gfx90a_vaddr_b73dc0:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vaddr.rst b/llvm/docs/AMDGPU/gfx90a_vaddr_f20ee4.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vaddr.rst
rename to llvm/docs/AMDGPU/gfx90a_vaddr_f20ee4.rst
index 511d90fa8d8e2..b13eb87f6358a 100644
--- a/llvm/docs/AMDGPU/gfx90a_vaddr.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vaddr_f20ee4.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vaddr:
+.. _amdgpu_synid_gfx90a_vaddr_f20ee4:
vaddr
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata0_1.rst b/llvm/docs/AMDGPU/gfx90a_vdata0_9ad749.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata0_1.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata0_9ad749.rst
index bb40b08ab5ef9..8300bfed42777 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata0_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata0_9ad749.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata0_1:
+.. _amdgpu_synid_gfx90a_vdata0_9ad749:
vdata0
======
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata0.rst b/llvm/docs/AMDGPU/gfx90a_vdata0_be4895.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata0.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata0_be4895.rst
index f93566d11f496..69bcaa056aa84 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata0.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata0_be4895.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata0:
+.. _amdgpu_synid_gfx90a_vdata0_be4895:
vdata0
======
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata1_1.rst b/llvm/docs/AMDGPU/gfx90a_vdata1_9ad749.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata1_1.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata1_9ad749.rst
index 6c39bb7817968..412eed6def73a 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata1_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata1_9ad749.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata1_1:
+.. _amdgpu_synid_gfx90a_vdata1_9ad749:
vdata1
======
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata1.rst b/llvm/docs/AMDGPU/gfx90a_vdata1_be4895.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata1.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata1_be4895.rst
index d30c31aff9321..3bd93925e7562 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata1_be4895.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata1:
+.. _amdgpu_synid_gfx90a_vdata1_be4895:
vdata1
======
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_8.rst b/llvm/docs/AMDGPU/gfx90a_vdata_2a60db.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_vdata_8.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_2a60db.rst
index 0753155bb0e74..39ac67cd69979 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_8.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_2a60db.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_8:
+.. _amdgpu_synid_gfx90a_vdata_2a60db:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_9.rst b/llvm/docs/AMDGPU/gfx90a_vdata_2d0375.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_vdata_9.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_2d0375.rst
index 158f7a5de4eca..dc03be71de14f 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_9.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_2d0375.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_9:
+.. _amdgpu_synid_gfx90a_vdata_2d0375:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_2.rst b/llvm/docs/AMDGPU/gfx90a_vdata_848ff7.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata_2.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_848ff7.rst
index 11452b2e3994c..0a07e44c05f0e 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_848ff7.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_2:
+.. _amdgpu_synid_gfx90a_vdata_848ff7:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_10.rst b/llvm/docs/AMDGPU/gfx90a_vdata_8e9b87.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_vdata_10.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_8e9b87.rst
index 0fa492ed28761..177e853fefd3b 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_10.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_8e9b87.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_10:
+.. _amdgpu_synid_gfx90a_vdata_8e9b87:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_7.rst b/llvm/docs/AMDGPU/gfx90a_vdata_929b59.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_vdata_7.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_929b59.rst
index 58860a450dae3..6c870aef7e610 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_7.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_929b59.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_7:
+.. _amdgpu_synid_gfx90a_vdata_929b59:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_1.rst b/llvm/docs/AMDGPU/gfx90a_vdata_9ad749.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata_1.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_9ad749.rst
index 9dbeaed23814b..69aef82210e74 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_9ad749.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_1:
+.. _amdgpu_synid_gfx90a_vdata_9ad749:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_6.rst b/llvm/docs/AMDGPU/gfx90a_vdata_a5f23e.rst
similarity index 95%
rename from llvm/docs/AMDGPU/gfx90a_vdata_6.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_a5f23e.rst
index 8deeb8de8db42..9ddef9897eacd 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_6.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_a5f23e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_6:
+.. _amdgpu_synid_gfx90a_vdata_a5f23e:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_4.rst b/llvm/docs/AMDGPU/gfx90a_vdata_af2725.rst
similarity index 82%
rename from llvm/docs/AMDGPU/gfx90a_vdata_4.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_af2725.rst
index 1a8450038bea5..447a86e975c35 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_af2725.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_4:
+.. _amdgpu_synid_gfx90a_vdata_af2725:
vdata
=====
@@ -16,10 +16,10 @@ Optionally may serve as an output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
-*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
+*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`:
* :ref:`dmask<amdgpu_synid_dmask>` may specify 1 data element for 32-bit-per-pixel surfaces or 2 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
-* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
Note: the surface data format is indicated in the image resource constant but not in the instruction.
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata.rst b/llvm/docs/AMDGPU/gfx90a_vdata_be4895.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_be4895.rst
index 8f3d77feb62a3..c06e9564336e8 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_be4895.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata:
+.. _amdgpu_synid_gfx90a_vdata_be4895:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_5.rst b/llvm/docs/AMDGPU/gfx90a_vdata_ca6e5f.rst
similarity index 82%
rename from llvm/docs/AMDGPU/gfx90a_vdata_5.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_ca6e5f.rst
index 6abc50efe97c8..36b51e37847e8 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_ca6e5f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_5:
+.. _amdgpu_synid_gfx90a_vdata_ca6e5f:
vdata
=====
@@ -16,10 +16,10 @@ Optionally may serve as an output data:
* If :ref:`glc<amdgpu_synid_glc>` is specified, gets the memory value before the operation.
-*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
+*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`:
* :ref:`dmask<amdgpu_synid_dmask>` may specify 2 data elements for 32-bit-per-pixel surfaces or 4 data elements for 64-bit-per-pixel surfaces. Each data element occupies 1 dword.
-* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
Note: the surface data format is indicated in the image resource constant but not in the instruction.
diff --git a/llvm/docs/AMDGPU/gfx90a_vdata_3.rst b/llvm/docs/AMDGPU/gfx90a_vdata_cfb402.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdata_3.rst
rename to llvm/docs/AMDGPU/gfx90a_vdata_cfb402.rst
index 46ba3338d8c19..8f0a7567dcff7 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdata_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdata_cfb402.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdata_3:
+.. _amdgpu_synid_gfx90a_vdata_cfb402:
vdata
=====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_1.rst b/llvm/docs/AMDGPU/gfx90a_vdst_0f48d1.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst_1.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_0f48d1.rst
index 955027743800b..c0909ba1825a9 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_0f48d1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_1:
+.. _amdgpu_synid_gfx90a_vdst_0f48d1:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_11.rst b/llvm/docs/AMDGPU/gfx90a_vdst_11.rst
deleted file mode 100644
index 36477152c56c6..0000000000000
--- a/llvm/docs/AMDGPU/gfx90a_vdst_11.rst
+++ /dev/null
@@ -1,17 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx90a_vdst_11:
-
-vdst
-====
-
-Instruction output: data read from a memory buffer.
-
-*Size:* 4 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_12.rst b/llvm/docs/AMDGPU/gfx90a_vdst_12.rst
deleted file mode 100644
index 01d2df9b09371..0000000000000
--- a/llvm/docs/AMDGPU/gfx90a_vdst_12.rst
+++ /dev/null
@@ -1,21 +0,0 @@
-..
- **************************************************
- * *
- * Automatically generated file, do not edit! *
- * *
- **************************************************
-
-.. _amdgpu_synid_gfx90a_vdst_12:
-
-vdst
-====
-
-Instruction output: data read from a memory buffer.
-
-If :ref:`lds<amdgpu_synid_lds>` is specified, this operand is ignored by H/W and data are stored directly into LDS.
-
-*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
-
- Note that :ref:`tfe<amdgpu_synid_tfe>` and :ref:`lds<amdgpu_synid_lds>` cannot be used together.
-
-*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_2.rst b/llvm/docs/AMDGPU/gfx90a_vdst_180bef.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst_2.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_180bef.rst
index 876a2350fcf3d..4138ee5136bdb 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_180bef.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_2:
+.. _amdgpu_synid_gfx90a_vdst_180bef:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_3.rst b/llvm/docs/AMDGPU/gfx90a_vdst_260aca.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst_3.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_260aca.rst
index 53869b1a9eb06..af72dd44b4a5e 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_260aca.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_3:
+.. _amdgpu_synid_gfx90a_vdst_260aca:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_10.rst b/llvm/docs/AMDGPU/gfx90a_vdst_5258b4.rst
similarity index 72%
rename from llvm/docs/AMDGPU/gfx90a_vdst_10.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_5258b4.rst
index b824f2087c8e1..0dd47dacdc2e7 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_10.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_5258b4.rst
@@ -5,13 +5,15 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_10:
+.. _amdgpu_synid_gfx90a_vdst_5258b4:
vdst
====
Instruction output: data read from a memory buffer.
-*Size:* 3 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+This is an optional operand. It must be used if and only if :ref:`lds<amdgpu_synid_lds>` is omitted.
+
+*Size:* 1 dword.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_16.rst b/llvm/docs/AMDGPU/gfx90a_vdst_69a144.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vdst_16.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_69a144.rst
index b2028a9ed2fb1..28911ab05f00a 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_16.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_69a144.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_16:
+.. _amdgpu_synid_gfx90a_vdst_69a144:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_13.rst b/llvm/docs/AMDGPU/gfx90a_vdst_78dd0a.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vdst_13.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_78dd0a.rst
index 60ea58ec1f6e7..7fbe6ac6ca212 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_13.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_78dd0a.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_13:
+.. _amdgpu_synid_gfx90a_vdst_78dd0a:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_7.rst b/llvm/docs/AMDGPU/gfx90a_vdst_7c9848.rst
similarity index 76%
rename from llvm/docs/AMDGPU/gfx90a_vdst_7.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_7c9848.rst
index c4a50804eac8b..c16a6873b0e18 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_7.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_7c9848.rst
@@ -5,17 +5,17 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_7:
+.. _amdgpu_synid_gfx90a_vdst_7c9848:
vdst
====
Image data to load by an image instruction.
-*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`, :ref:`tfe<amdgpu_synid_tfe>` and :ref:`d16<amdgpu_synid_d16>`:
+*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`d16<amdgpu_synid_d16>`:
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies either 32 bits or 16 bits depending on :ref:`d16<amdgpu_synid_d16>`.
* :ref:`d16<amdgpu_synid_d16>` specifies that data elements in registers are packed; each value occupies 16 bits.
-* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_14.rst b/llvm/docs/AMDGPU/gfx90a_vdst_89680f.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vdst_14.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_89680f.rst
index d63a6ce179a45..b7430b947d7d6 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_14.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_89680f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_14:
+.. _amdgpu_synid_gfx90a_vdst_89680f:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_18.rst b/llvm/docs/AMDGPU/gfx90a_vdst_8c77d4.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst_18.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_8c77d4.rst
index d9aecae4b93ab..4c5f1fc9b7910 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_18.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_8c77d4.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_18:
+.. _amdgpu_synid_gfx90a_vdst_8c77d4:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_8.rst b/llvm/docs/AMDGPU/gfx90a_vdst_a32035.rst
similarity index 77%
rename from llvm/docs/AMDGPU/gfx90a_vdst_8.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_a32035.rst
index 01b73aee14622..83ad6d946d9c7 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_8.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_a32035.rst
@@ -5,13 +5,13 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_8:
+.. _amdgpu_synid_gfx90a_vdst_a32035:
vdst
====
Instruction output: data read from a memory buffer.
-*Size:* 1 dword by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+*Size:* 4 dwords.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_15.rst b/llvm/docs/AMDGPU/gfx90a_vdst_bdb32f.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vdst_15.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_bdb32f.rst
index 75f97e627f923..cde73a6ea9c82 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_15.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_bdb32f.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_15:
+.. _amdgpu_synid_gfx90a_vdst_bdb32f:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_19.rst b/llvm/docs/AMDGPU/gfx90a_vdst_c8d317.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst_19.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_c8d317.rst
index 426b2c25fa1cd..058f88a3944aa 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_19.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_c8d317.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_19:
+.. _amdgpu_synid_gfx90a_vdst_c8d317:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_4.rst b/llvm/docs/AMDGPU/gfx90a_vdst_c8ee02.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_vdst_4.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_c8ee02.rst
index dbab63177b949..1a4e87977a8fa 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_c8ee02.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_4:
+.. _amdgpu_synid_gfx90a_vdst_c8ee02:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_d0c0cb.rst b/llvm/docs/AMDGPU/gfx90a_vdst_d0c0cb.rst
new file mode 100644
index 0000000000000..05a10b4d3f0dc
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_d0c0cb.rst
@@ -0,0 +1,17 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx90a_vdst_d0c0cb:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 1 dword.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_17.rst b/llvm/docs/AMDGPU/gfx90a_vdst_d6f4bd.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst_17.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_d6f4bd.rst
index df6d067592fb2..e0faf4ff7f11d 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_17.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_d6f4bd.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_17:
+.. _amdgpu_synid_gfx90a_vdst_d6f4bd:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_d8236e.rst b/llvm/docs/AMDGPU/gfx90a_vdst_d8236e.rst
new file mode 100644
index 0000000000000..a6f4fda43a26e
--- /dev/null
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_d8236e.rst
@@ -0,0 +1,17 @@
+..
+ **************************************************
+ * *
+ * Automatically generated file, do not edit! *
+ * *
+ **************************************************
+
+.. _amdgpu_synid_gfx90a_vdst_d8236e:
+
+vdst
+====
+
+Instruction output: data read from a memory buffer.
+
+*Size:* 2 dwords.
+
+*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_9.rst b/llvm/docs/AMDGPU/gfx90a_vdst_e2898f.rst
similarity index 77%
rename from llvm/docs/AMDGPU/gfx90a_vdst_9.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_e2898f.rst
index 9d2a42dcff3bf..6e59c7f4bfa77 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_9.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_e2898f.rst
@@ -5,13 +5,13 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_9:
+.. _amdgpu_synid_gfx90a_vdst_e2898f:
vdst
====
Instruction output: data read from a memory buffer.
-*Size:* 2 dwords by default. :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+*Size:* 3 dwords.
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_5.rst b/llvm/docs/AMDGPU/gfx90a_vdst_ef6c94.rst
similarity index 93%
rename from llvm/docs/AMDGPU/gfx90a_vdst_5.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_ef6c94.rst
index fba2e0a258983..12d692051dbd5 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_ef6c94.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_5:
+.. _amdgpu_synid_gfx90a_vdst_ef6c94:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst_6.rst b/llvm/docs/AMDGPU/gfx90a_vdst_f47b9b.rst
similarity index 74%
rename from llvm/docs/AMDGPU/gfx90a_vdst_6.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_f47b9b.rst
index f3bc6ae375830..dcd7fc5e79e81 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst_6.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_f47b9b.rst
@@ -5,16 +5,16 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst_6:
+.. _amdgpu_synid_gfx90a_vdst_f47b9b:
vdst
====
Image data to load by an image instruction.
-*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>` and :ref:`tfe<amdgpu_synid_tfe>`:
+*Size:* depends on :ref:`dmask<amdgpu_synid_dmask>`:
* :ref:`dmask<amdgpu_synid_dmask>` may specify from 1 to 4 data elements. Each data element occupies 1 dword.
-* :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
+
*Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`
diff --git a/llvm/docs/AMDGPU/gfx90a_vdst.rst b/llvm/docs/AMDGPU/gfx90a_vdst_fa7dbd.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vdst.rst
rename to llvm/docs/AMDGPU/gfx90a_vdst_fa7dbd.rst
index 635809c2eb1ba..345ccd102f371 100644
--- a/llvm/docs/AMDGPU/gfx90a_vdst.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vdst_fa7dbd.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vdst:
+.. _amdgpu_synid_gfx90a_vdst_fa7dbd:
vdst
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vsrc.rst b/llvm/docs/AMDGPU/gfx90a_vsrc_1027ca.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vsrc.rst
rename to llvm/docs/AMDGPU/gfx90a_vsrc_1027ca.rst
index 5b5934e19d28f..db8d8053d92dc 100644
--- a/llvm/docs/AMDGPU/gfx90a_vsrc.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vsrc_1027ca.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vsrc:
+.. _amdgpu_synid_gfx90a_vsrc_1027ca:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vsrc_1.rst b/llvm/docs/AMDGPU/gfx90a_vsrc_6802ce.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vsrc_1.rst
rename to llvm/docs/AMDGPU/gfx90a_vsrc_6802ce.rst
index b9e7b0ed98fc4..2f25d25b4d564 100644
--- a/llvm/docs/AMDGPU/gfx90a_vsrc_1.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vsrc_6802ce.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vsrc_1:
+.. _amdgpu_synid_gfx90a_vsrc_6802ce:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vsrc_4.rst b/llvm/docs/AMDGPU/gfx90a_vsrc_9ad749.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vsrc_4.rst
rename to llvm/docs/AMDGPU/gfx90a_vsrc_9ad749.rst
index 29f30b421869b..58e079c9b6121 100644
--- a/llvm/docs/AMDGPU/gfx90a_vsrc_4.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vsrc_9ad749.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vsrc_4:
+.. _amdgpu_synid_gfx90a_vsrc_9ad749:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vsrc_5.rst b/llvm/docs/AMDGPU/gfx90a_vsrc_be4895.rst
similarity index 91%
rename from llvm/docs/AMDGPU/gfx90a_vsrc_5.rst
rename to llvm/docs/AMDGPU/gfx90a_vsrc_be4895.rst
index fbfb8795691e1..13c32c90ddebf 100644
--- a/llvm/docs/AMDGPU/gfx90a_vsrc_5.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vsrc_be4895.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vsrc_5:
+.. _amdgpu_synid_gfx90a_vsrc_be4895:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vsrc_3.rst b/llvm/docs/AMDGPU/gfx90a_vsrc_e016a1.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vsrc_3.rst
rename to llvm/docs/AMDGPU/gfx90a_vsrc_e016a1.rst
index 13bffbad38e20..29e56e6280943 100644
--- a/llvm/docs/AMDGPU/gfx90a_vsrc_3.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vsrc_e016a1.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vsrc_3:
+.. _amdgpu_synid_gfx90a_vsrc_e016a1:
vsrc
====
diff --git a/llvm/docs/AMDGPU/gfx90a_vsrc_2.rst b/llvm/docs/AMDGPU/gfx90a_vsrc_fd235e.rst
similarity index 90%
rename from llvm/docs/AMDGPU/gfx90a_vsrc_2.rst
rename to llvm/docs/AMDGPU/gfx90a_vsrc_fd235e.rst
index 1793c49e8b501..f04e052674aa7 100644
--- a/llvm/docs/AMDGPU/gfx90a_vsrc_2.rst
+++ b/llvm/docs/AMDGPU/gfx90a_vsrc_fd235e.rst
@@ -5,7 +5,7 @@
* *
**************************************************
-.. _amdgpu_synid_gfx90a_vsrc_2:
+.. _amdgpu_synid_gfx90a_vsrc_fd235e:
vsrc
====
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