[llvm] a97a79d - [TableGen] Add a knob for MCOperandInfo expansion in gen-instr-info

[Amir Ayupov via llvm-commits]

Author: Amir Ayupov
Date: 2022-06-29T00:59:16-07:00
New Revision: a97a79da027211bce150892d1eebf334e526c0d8

URL: https://github.com/llvm/llvm-project/commit/a97a79da027211bce150892d1eebf334e526c0d8
DIFF: https://github.com/llvm/llvm-project/commit/a97a79da027211bce150892d1eebf334e526c0d8.diff

LOG: [TableGen] Add a knob for MCOperandInfo expansion in gen-instr-info

Control the MCOperandInfo expansion with `-instr-info-expand-mi-operand-info`.
For X86, this would make it possible to see memory operand type e.g.:
```
    /* MOV8rm */
    GR8, i8mem,
    /* MOV8rm_NOREX */
    GR8_NOREX, i8mem_NOREX,
```

The intended use is a follow-up diff D126116 (`getMemOperandSize`).

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D127932

Added: 
    llvm/test/TableGen/get-operand-type-no-expand.td

Modified: 
    llvm/utils/TableGen/InstrInfoEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/test/TableGen/get-operand-type-no-expand.td b/llvm/test/TableGen/get-operand-type-no-expand.td
new file mode 100644
index 0000000000000..9dfcbfaec76af
--- /dev/null
+++ b/llvm/test/TableGen/get-operand-type-no-expand.td
@@ -0,0 +1,48 @@
+// Test -instr-info-expand-mi-operand-info=0 mode which keeps complex operands
+// that contain a DAG of basic operands unexpanded (the default is to expand).
+
+include "llvm/Target/Target.td"
+
+def archInstrInfo : InstrInfo { }
+
+def arch : Target {
+  let InstructionSet = archInstrInfo;
+}
+
+def Reg : Register<"reg">;
+def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
+
+class ComplexOperand<int size> : Operand<iPTR> {
+  let MIOperandInfo = (ops i8imm, i32imm);
+  int Size = size;
+}
+
+def i8complex : ComplexOperand<8>;
+def i512complex: ComplexOperand<512>;
+
+def InstA : Instruction {
+  let Size = 1;
+  let OutOperandList = (outs i512complex:$a);
+  let InOperandList = (ins i8complex:$b, i32imm:$c);
+  field bits<8> Inst;
+  field bits<8> SoftFail = 0;
+  let Namespace = "MyNamespace";
+}
+
+// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s \
+// RUN:   -instr-info-expand-mi-operand-info=1 \
+// RUN:   | FileCheck %s --check-prefix=CHECK-EXPAND
+// CHECK-EXPAND: #ifdef GET_INSTRINFO_OPERAND_TYPE
+// CHECK-EXPAND: OpcodeOperandTypes[] = {
+// CHECK-EXPAND:        /* InstA */
+// CHECK-EXPAND-NEXT:   i8imm, i32imm, i8imm, i32imm, i32imm,
+// CHECK-EXPAND: #endif // GET_INSTRINFO_OPERAND_TYPE
+
+// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s \
+// RUN:   -instr-info-expand-mi-operand-info=0 \
+// RUN:   | FileCheck %s --check-prefix=CHECK-NOEXPAND
+// CHECK-NOEXPAND: #ifdef GET_INSTRINFO_OPERAND_TYPE
+// CHECK-NOEXPAND: OpcodeOperandTypes[] = {
+// CHECK-NOEXPAND:        /* InstA */
+// CHECK-NOEXPAND-NEXT:   i512complex, i8complex, i32imm,
+// CHECK-NOEXPAND: #endif // GET_INSTRINFO_OPERAND_TYPE

diff  --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index e33843b0c06a2..a7a4f4f5f1a7f 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -36,6 +36,12 @@
 
 using namespace llvm;
 
+cl::OptionCategory InstrInfoEmitterCat("Options for -gen-instr-info");
+static cl::opt<bool> ExpandMIOperandInfo(
+    "instr-info-expand-mi-operand-info",
+    cl::desc("Expand operand's MIOperandInfo DAG into suboperands"),
+    cl::cat(InstrInfoEmitterCat), cl::init(true));
+
 namespace {
 
 class InstrInfoEmitter {
@@ -391,7 +397,7 @@ void InstrInfoEmitter::emitOperandTypeMappings(
       OperandOffsets.push_back(CurrentOffset);
       for (const auto &Op : Inst->Operands) {
         const DagInit *MIOI = Op.MIOperandInfo;
-        if (!MIOI || MIOI->getNumArgs() == 0) {
+        if (!ExpandMIOperandInfo || !MIOI || MIOI->getNumArgs() == 0) {
           // Single, anonymous, operand.
           OperandRecords.push_back(Op.Rec);
           ++CurrentOffset;