[llvm] 370127b - [XCOFF] change default program code csect alignment to 32
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 28 21:17:03 PDT 2022
Author: Chen Zheng
Date: 2022-06-29T04:16:01Z
New Revision: 370127b7d5865c7e8cfa4d333bb2d406e2cc0247
URL: https://github.com/llvm/llvm-project/commit/370127b7d5865c7e8cfa4d333bb2d406e2cc0247
DIFF: https://github.com/llvm/llvm-project/commit/370127b7d5865c7e8cfa4d333bb2d406e2cc0247.diff
LOG: [XCOFF] change default program code csect alignment to 32
This is the same with commercial XLC on AIX.
Reviewed By: Esme
Differential Revision: https://reviews.llvm.org/D114419
Added:
Modified:
llvm/include/llvm/MC/MCSectionXCOFF.h
llvm/test/CodeGen/PowerPC/aix-alias.ll
llvm/test/CodeGen/PowerPC/aix-dwarf.ll
llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
llvm/test/CodeGen/PowerPC/aix-exception.ll
llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
llvm/test/CodeGen/PowerPC/aix-extern.ll
llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
llvm/test/CodeGen/PowerPC/aix-personality-alias.ll
llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
llvm/test/CodeGen/PowerPC/aix-weak.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
llvm/test/CodeGen/PowerPC/test_func_desc.ll
llvm/test/DebugInfo/XCOFF/empty.ll
llvm/test/DebugInfo/XCOFF/explicit-section.ll
llvm/test/DebugInfo/XCOFF/function-sections.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCSectionXCOFF.h b/llvm/include/llvm/MC/MCSectionXCOFF.h
index 1b68d2726c74f..95332647c9bea 100644
--- a/llvm/include/llvm/MC/MCSectionXCOFF.h
+++ b/llvm/include/llvm/MC/MCSectionXCOFF.h
@@ -38,6 +38,7 @@ class MCSectionXCOFF final : public MCSection {
Optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSubtypeFlags;
bool MultiSymbolsAllowed;
static constexpr unsigned DefaultAlignVal = 4;
+ static constexpr unsigned DefaultTextAlignVal = 32;
MCSectionXCOFF(StringRef Name, XCOFF::StorageMappingClass SMC,
XCOFF::SymbolType ST, SectionKind K, MCSymbolXCOFF *QualName,
@@ -57,9 +58,14 @@ class MCSectionXCOFF final : public MCSection {
QualName->setRepresentedCsect(this);
QualName->setStorageClass(XCOFF::C_HIDEXT);
- // A csect is 4 byte aligned by default, except for undefined symbol csects.
- if (ST != XCOFF::XTY_ER)
- setAlignment(Align(DefaultAlignVal));
+ if (ST != XCOFF::XTY_ER) {
+ // For a csect for program code, set the alignment to 32 bytes by default.
+ // For other csects, set the alignment to 4 bytes by default.
+ if (SMC == XCOFF::XMC_PR)
+ setAlignment(Align(DefaultTextAlignVal));
+ else
+ setAlignment(Align(DefaultAlignVal));
+ }
}
MCSectionXCOFF(StringRef Name, SectionKind K, MCSymbolXCOFF *QualName,
@@ -74,9 +80,8 @@ class MCSectionXCOFF final : public MCSection {
// FIXME: use a more meaningful name for non csect sections.
QualName->setRepresentedCsect(this);
- // Set default alignment 4 for all non csect sections for now.
- // FIXME: set
diff erent alignments according to section types.
- setAlignment(Align(DefaultAlignVal));
+ // Use default text alignment as the alignment for DWARF sections.
+ setAlignment(Align(DefaultTextAlignVal));
}
void printCsectDirective(raw_ostream &OS) const;
diff --git a/llvm/test/CodeGen/PowerPC/aix-alias.ll b/llvm/test/CodeGen/PowerPC/aix-alias.ll
index fe2bd3eedc1e1..be35fd526a498 100644
--- a/llvm/test/CodeGen/PowerPC/aix-alias.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-alias.ll
@@ -56,7 +56,7 @@ entry:
; ASM-NEXT: .csect fun[DS]
; ASM-NEXT: fun_weak: # @fun
; ASM-NEXT: fun_hidden:
-; ASM: .csect .text[PR],2
+; ASM: .csect .text[PR],5
; ASM-NEXT: .fun:
; ASM-NEXT: .fun_weak:
; ASM-NEXT: .fun_hidden:
@@ -64,7 +64,7 @@ entry:
; ASM-NEXT: li 3, 0
; ASM-NEXT: blr
; ASM-NEXT: # -- End function
-; ASM: .csect .text[PR],2
+; ASM: .csect .text[PR],5
; ASM-NEXT: .test:
; ASM-NEXT: # %bb.0: # %entry
; ASM: bl .fun
diff --git a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
index 485202d180641..8256be9611c16 100644
--- a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
@@ -62,10 +62,10 @@ entry:
; SEC-NEXT: VirtualAddress: 0x28
; SEC32-NEXT: Size: 0xC
; SEC32-NEXT: RawDataOffset: 0x104
-; SEC32-NEXT: RelocationPointer: 0x1D8
+; SEC32-NEXT: RelocationPointer: 0x1F4
; SEC64-NEXT: Size: 0x18
; SEC64-NEXT: RawDataOffset: 0x1A8
-; SEC64-NEXT: RelocationPointer: 0x2B0
+; SEC64-NEXT: RelocationPointer: 0x2C8
; SEC-NEXT: LineNumberPointer: 0x0
; SEC-NEXT: NumberOfRelocations: 2
; SEC-NEXT: NumberOfLineNumbers: 0
@@ -77,7 +77,7 @@ entry:
; SEC-NEXT: PhysicalAddress: 0x0
; SEC-NEXT: VirtualAddress: 0x0
; SEC-NEXT: Size: 0x36
-; SEC32-NEXT: RawDataOffset: 0x110
+; SEC32-NEXT: RawDataOffset: 0x11C
; SEC64-NEXT: RawDataOffset: 0x1C0
; SEC-NEXT: RelocationPointer: 0x0
; SEC-NEXT: LineNumberPointer: 0x0
@@ -91,11 +91,11 @@ entry:
; SEC-NEXT: PhysicalAddress: 0x0
; SEC-NEXT: VirtualAddress: 0x0
; SEC32-NEXT: Size: 0x57
-; SEC32-NEXT: RawDataOffset: 0x148
-; SEC32-NEXT: RelocationPointer: 0x1EC
+; SEC32-NEXT: RawDataOffset: 0x15C
+; SEC32-NEXT: RelocationPointer: 0x208
; SEC64-NEXT: Size: 0x6F
-; SEC64-NEXT: RawDataOffset: 0x1F8
-; SEC64-NEXT: RelocationPointer: 0x2CC
+; SEC64-NEXT: RawDataOffset: 0x200
+; SEC64-NEXT: RelocationPointer: 0x2E4
; SEC-NEXT: LineNumberPointer: 0x0
; SEC-NEXT: NumberOfRelocations: 4
; SEC-NEXT: NumberOfLineNumbers: 0
@@ -107,11 +107,11 @@ entry:
; SEC-NEXT: PhysicalAddress: 0x0
; SEC-NEXT: VirtualAddress: 0x0
; SEC32-NEXT: Size: 0x36
-; SEC32-NEXT: RawDataOffset: 0x1A0
-; SEC32-NEXT: RelocationPointer: 0x214
+; SEC32-NEXT: RawDataOffset: 0x1BC
+; SEC32-NEXT: RelocationPointer: 0x230
; SEC64-NEXT: Size: 0x46
-; SEC64-NEXT: RawDataOffset: 0x268
-; SEC64-NEXT: RelocationPointer: 0x304
+; SEC64-NEXT: RawDataOffset: 0x280
+; SEC64-NEXT: RelocationPointer: 0x31C
; SEC-NEXT: LineNumberPointer: 0x0
; SEC-NEXT: NumberOfRelocations: 1
; SEC-NEXT: NumberOfLineNumbers: 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
index 4bf1cb3e8efc5..ca861963025c5 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
@@ -89,8 +89,8 @@ entry:
; COMMON-NEXT: .align 2
; COMMON-NEXT: .vbyte 4, 0
; COMMON-NEXT: .vbyte 4, 0
-; CHECK-ASM-NEXT: .csect .text[PR],2
-; CHECK-FUNC-NEXT: .csect .foov[PR],2
+; CHECK-ASM-NEXT: .csect .text[PR],5
+; CHECK-FUNC-NEXT: .csect .foov[PR],5
; COMMON-NEXT: # -- End function
; COMMON: .toc
; COMMON: L..C2:
diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
index 23de34940fb06..0cde8a0e0525b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable.ll
@@ -141,7 +141,7 @@ entry:
}
; CHECK-ASM-LABEL: ._Z10add_structifd1SP2SD1Di:{{[[:space:]] *}}# %bb.0:
-; CHECK-FUNC-LABEL: csect ._Z10add_structifd1SP2SD1Di[PR],2{{[[:space:]] *}}# %bb.0:
+; CHECK-FUNC-LABEL: csect ._Z10add_structifd1SP2SD1Di[PR],5{{[[:space:]] *}}# %bb.0:
; COMMON-NEXT: lwz 4, L..C0(2)
; COMMON-NEXT: stfs 1, -24(1)
; COMMON-NEXT: lfs 0, 0(4)
@@ -174,7 +174,7 @@ entry:
; CHECK-ASM-LABEL: .main:{{[[:space:]] *}}# %bb.0:
-; CHECK-FUNC-LABEL: .csect .main[PR],2{{[[:space:]] *}}# %bb.0
+; CHECK-FUNC-LABEL: .csect .main[PR],5{{[[:space:]] *}}# %bb.0
; COMMON-NEXT: mflr 0
; COMMON-NEXT: stw 0, 8(1)
; COMMON: mtlr 0
@@ -202,7 +202,7 @@ entry:
; CHECK-ASM-LABEL: ._Z7add_bari1SfdP2SD1Di:{{[[:space:]] *}}# %bb.0:
-; CHECK-FUNC-LABEL: .csect ._Z7add_bari1SfdP2SD1Di[PR],2{{[[:space:]] *}}# %bb.0:
+; CHECK-FUNC-LABEL: .csect ._Z7add_bari1SfdP2SD1Di[PR],5{{[[:space:]] *}}# %bb.0:
; COMMON: .vbyte 4, 0x00000000 # Traceback table begin
; COMMON-NEXT: .byte 0x00 # Version = 0
; COMMON-NEXT: .byte 0x09 # Language = CPlusPlus
@@ -226,7 +226,7 @@ entry:
; CHECK-ASM-LABEL: .foo:{{[[:space:]] *}}# %bb.0:
-; CHECK-FUNC-LABEL: .csect .foo[PR],2{{[[:space:]] *}}# %bb.0:
+; CHECK-FUNC-LABEL: .csect .foo[PR],5{{[[:space:]] *}}# %bb.0:
; COMMON: stw 3, -4(1)
; COMMON-NEXT: blr
; COMMON-NEXT:L..foo0:
diff --git a/llvm/test/CodeGen/PowerPC/aix-exception.ll b/llvm/test/CodeGen/PowerPC/aix-exception.ll
index 52ebfd34e40e3..2abaeea1a6169 100644
--- a/llvm/test/CodeGen/PowerPC/aix-exception.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-exception.ll
@@ -28,7 +28,7 @@ entry:
}
; ASMNFS: ._Z9throwFuncv:
-; ASMFS: .csect ._Z9throwFuncv[PR],2
+; ASMFS: .csect ._Z9throwFuncv[PR],5
; ASM: bl .__cxa_allocate_exception[PR]
; ASM: nop
; ASM32: lwz 4, L..C0(2)
@@ -90,7 +90,7 @@ eh.resume: ; preds = %catch.dispatch
}
; ASMNFS: ._Z9catchFuncv:
-; ASMFS: .csect ._Z9catchFuncv[PR],2
+; ASMFS: .csect ._Z9catchFuncv[PR],5
; ASM: L..func_begin0:
; ASM: # %bb.0: # %entry
; ASM: mflr 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
index 4e282d23d730e..ae4d16a8751f7 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
@@ -192,7 +192,7 @@ declare extern_weak void @foo_ext_weak(i32*)
; CHECKSYM-NEXT: SectionLen: 80
; CHECKSYM-NEXT: ParameterHashIndex: 0x0
; CHECKSYM-NEXT: TypeChkSectNum: 0x0
-; CHECKSYM-NEXT: SymbolAlignmentLog2: 4
+; CHECKSYM-NEXT: SymbolAlignmentLog2: 5
; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1)
; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; CHECKSYM32-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll
index 6b8573ee6d459..e7056a4abe96a 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll
@@ -215,7 +215,7 @@ declare i32 @bar_extern(i32*)
; CHECKSYM-NEXT: SectionLen: 112
; CHECKSYM-NEXT: ParameterHashIndex: 0x0
; CHECKSYM-NEXT: TypeChkSectNum: 0x0
-; CHECKSYM-NEXT: SymbolAlignmentLog2: 4
+; CHECKSYM-NEXT: SymbolAlignmentLog2: 5
; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1)
; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; CHECKSYM32-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
index d3f1712576ce5..e290787c92d88 100644
--- a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
@@ -34,7 +34,7 @@ entry:
; CHECK-NEXT: SectionLen: 4
; CHECK-NEXT: ParameterHashIndex: 0x0
; CHECK-NEXT: TypeChkSectNum: 0x0
-; CHECK-NEXT: SymbolAlignmentLog2: 4
+; CHECK-NEXT: SymbolAlignmentLog2: 5
; CHECK-NEXT: SymbolType: XTY_SD (0x1)
; CHECK-NEXT: StorageMappingClass: XMC_PR (0x0)
; CHECK-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
index 24803e91a6d17..918cde4567939 100644
--- a/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
@@ -190,7 +190,7 @@
; 64LARGE-ASM: .vbyte 4, L..BB0_4-L..JTI0_0
; 64LARGE-ASM: .vbyte 4, L..BB0_5-L..JTI0_0
-; FUNC-ASM: .csect .jump_table[PR],2
+; FUNC-ASM: .csect .jump_table[PR],5
; FUNC-ASM: L..BB0_2:
; FUNC-ASM: L..BB0_3:
; FUNC-ASM: L..BB0_4:
diff --git a/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll b/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll
index 1405efbeaed51..b900a35e8df35 100644
--- a/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-personality-alias.ll
@@ -56,7 +56,7 @@ declare void @_Z3barv()
; SYM64: .vbyte 8, .__gxx_personality_v0
; SYM64: .vbyte 8, TOC[TC0]
; SYM64: .vbyte 8, 0
-; SYM: .csect .text[PR],2
+; SYM: .csect .text[PR],5
; SYM: .__gxx_personality_v0:
; SYM: .__xlcxx_personality_v1:
; SYM: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
index 550f2c29cd3a0..0663f071b3dbb 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc-large.ll
@@ -251,7 +251,7 @@ entry:
; SYM-NEXT: SectionLen: 132
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
-; SYM-NEXT: SymbolAlignmentLog2: 4
+; SYM-NEXT: SymbolAlignmentLog2: 5
; SYM-NEXT: SymbolType: XTY_SD (0x1)
; SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; SYM-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
index 8485743ade80c..2539f4a477841 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-reloc.ll
@@ -212,7 +212,7 @@ entry:
; SYM-NEXT: SectionLen: 104
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
-; SYM-NEXT: SymbolAlignmentLog2: 4
+; SYM-NEXT: SymbolAlignmentLog2: 5
; SYM-NEXT: SymbolType: XTY_SD (0x1)
; SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; SYM-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
index dfa8f5513f0e6..dadf2f888448f 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-xcoff-variables.ll
@@ -128,7 +128,7 @@
; SYMS-NEXT: SectionLen: 0
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
-; SYMS-NEXT: SymbolAlignmentLog2: 2
+; SYMS-NEXT: SymbolAlignmentLog2: 5
; SYMS-NEXT: SymbolType: XTY_SD (0x1)
; SYMS-NEXT: StorageMappingClass: XMC_PR (0x0)
; SYMS-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll
index 57cc5abdce8ee..74467444300cb 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll
@@ -122,7 +122,7 @@ entry:
; CHECKSYM-NEXT: SectionLen: 136
; CHECKSYM-NEXT: ParameterHashIndex: 0x0
; CHECKSYM-NEXT: TypeChkSectNum: 0x0
-; CHECKSYM-NEXT: SymbolAlignmentLog2: 4
+; CHECKSYM-NEXT: SymbolAlignmentLog2: 5
; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1)
; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; CHECKSYM32-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index d187ff054083c..9ebb66e9ecd15 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -45,7 +45,7 @@
; CHECK-NOT: .toc
-; CHECK: .csect .text[PR],2
+; CHECK: .csect .text[PR],5
; CHECK-NEXT: .file
; CHECK: .csect .data[RW],5
@@ -229,7 +229,7 @@
; SYMS-NEXT: SectionLen: 0
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
-; SYMS-NEXT: SymbolAlignmentLog2: 2
+; SYMS-NEXT: SymbolAlignmentLog2: 5
; SYMS-NEXT: SymbolType: XTY_SD (0x1)
; SYMS-NEXT: StorageMappingClass: XMC_PR (0x0)
; SYMS32-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
index 3c159fd848fcc..2ecbd1ae31b23 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
@@ -25,7 +25,7 @@ entry:
; CHECK-NEXT: .globl .ext_fun
; CHECK-NEXT: .align 4
; CHECK-NEXT: .csect ext_fun[DS]
-; CHECK: .csect .ext_fun_sec[PR],2
+; CHECK: .csect .ext_fun_sec[PR],5
; CHECK-NEXT: .ext_fun:
; CHECK: .csect .ext_const_sec[RO],2
; CHECK-NEXT: .globl ext_const
@@ -90,7 +90,7 @@ entry:
; CHECKSYM-NEXT: SectionLen: 28
; CHECKSYM-NEXT: ParameterHashIndex: 0x0
; CHECKSYM-NEXT: TypeChkSectNum: 0x0
-; CHECKSYM-NEXT: SymbolAlignmentLog2: 4
+; CHECKSYM-NEXT: SymbolAlignmentLog2: 5
; CHECKSYM-NEXT: SymbolType: XTY_SD (0x1)
; CHECKSYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; CHECKSYM-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
index acc521e028859..029865eb4ffab 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-funcsect.ll
@@ -34,7 +34,7 @@ entry:
ret void
}
-; ASM: .csect .foo[PR],2
+; ASM: .csect .foo[PR],5
; ASM-NEXT: .globl foo[DS] # -- Begin function foo
; ASM-NEXT: .globl .foo[PR]
; ASM-NEXT: .align 4
@@ -43,11 +43,11 @@ entry:
; ASM-NEXT: .vbyte {{[0-9]+}}, .foo[PR]
; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0]
; ASM-NEXT: .vbyte {{[0-9]+}}, 0
-; ASM-NEXT: .csect .foo[PR],2
+; ASM-NEXT: .csect .foo[PR],5
; ASM-NEXT: .alias_foo:
; ASM-NEXT: # %bb.0: # %entry
; ASM-NEXT: blr
-; ASM: .csect .hidden_foo[PR],2
+; ASM: .csect .hidden_foo[PR],5
; ASM-NEXT: .globl hidden_foo[DS],hidden # -- Begin function hidden_foo
; ASM-NEXT: .globl .hidden_foo[PR],hidden
; ASM-NEXT: .align 4
@@ -58,7 +58,7 @@ entry:
; ASM-NEXT: .csect .hidden_foo[PR]
; ASM-NEXT: # %bb.0: # %entry
; ASM-NEXT: blr
-; ASM: .csect .bar[PR],2
+; ASM: .csect .bar[PR],5
; ASM-NEXT: .globl bar[DS] # -- Begin function bar
; ASM-NEXT: .globl .bar[PR]
; ASM-NEXT: .align 4
@@ -66,7 +66,7 @@ entry:
; ASM-NEXT: .vbyte {{[0-9]+}}, .bar[PR] # @bar
; ASM-NEXT: .vbyte {{[0-9]+}}, TOC[TC0]
; ASM-NEXT: .vbyte {{[0-9]+}}, 0
-; ASM-NEXT: .csect .bar[PR],2
+; ASM-NEXT: .csect .bar[PR],5
; ASM-NEXT: # %bb.0: # %entry
; ASM: bl .foo[PR]
; ASM-NEXT: nop
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
index c64552f9852c0..18c18554625c1 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc-symb.mir
@@ -47,7 +47,7 @@ body: |
# SYM-NEXT: SectionLen: 8
# SYM-NEXT: ParameterHashIndex: 0x0
# SYM-NEXT: TypeChkSectNum: 0x0
-# SYM-NEXT: SymbolAlignmentLog2: 4
+# SYM-NEXT: SymbolAlignmentLog2: 5
# SYM-NEXT: SymbolType: XTY_SD (0x1)
# SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
# SYM-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index 1423a86330bea..eb60e2f8c71d3 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -222,7 +222,7 @@ declare i32 @bar(i32)
; SYM-NEXT: SectionLen: 64
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
-; SYM-NEXT: SymbolAlignmentLog2: 4
+; SYM-NEXT: SymbolAlignmentLog2: 5
; SYM-NEXT: SymbolType: XTY_SD (0x1)
; SYM-NEXT: StorageMappingClass: XMC_PR (0x0)
; SYM32-NEXT: StabInfoIndex: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
index 080f01befb4b1..2a11bce5eef9e 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
@@ -54,7 +54,7 @@ declare i32 @"f\40o"(...)
; ASM-NEXT: .vbyte 4, ._Renamed..24f_o # @"f$o"
; ASM-NEXT: .vbyte 4, TOC[TC0]
; ASM-NEXT: .vbyte 4, 0
-; ASM-NEXT: .csect .text[PR],2
+; ASM-NEXT: .csect .text[PR],5
; ASM-NEXT: ._Renamed..24f_o:
; ASM: bl ._Renamed..40f_o[PR]
; ASM-NEXT: nop
@@ -67,7 +67,7 @@ declare i32 @"f\40o"(...)
; ASM-NEXT: .vbyte 4, ._Renamed..26f_o # @"f&o"
; ASM-NEXT: .vbyte 4, TOC[TC0]
; ASM-NEXT: .vbyte 4, 0
-; ASM-NEXT: .csect .text[PR],2
+; ASM-NEXT: .csect .text[PR],5
; ASM-NEXT: ._Renamed..26f_o:
; ASM: bl ._Renamed..24f_o
; ASM: .globl _Renamed..265ff__o[DS] # -- Begin function f&_o
@@ -79,7 +79,7 @@ declare i32 @"f\40o"(...)
; ASM-NEXT: .vbyte 4, ._Renamed..265ff__o # @"f&_o"
; ASM-NEXT: .vbyte 4, TOC[TC0]
; ASM-NEXT: .vbyte 4, 0
-; ASM-NEXT: .csect .text[PR],2
+; ASM-NEXT: .csect .text[PR],5
; ASM-NEXT: ._Renamed..265ff__o:
; ASM: .csect .data[RW],2
; ASM-NEXT: .globl _Renamed..60f_o
diff --git a/llvm/test/CodeGen/PowerPC/test_func_desc.ll b/llvm/test/CodeGen/PowerPC/test_func_desc.ll
index 4c79bafeb035f..63154fd94cde8 100644
--- a/llvm/test/CodeGen/PowerPC/test_func_desc.ll
+++ b/llvm/test/CodeGen/PowerPC/test_func_desc.ll
@@ -37,7 +37,7 @@ entry:
; 64BIT-NEXT: .vbyte 8, .foo
; 64BIT-NEXT: .vbyte 8, TOC[TC0]
; 64BIT-NEXT: .vbyte 8, 0
-; CHECK-NEXT: .csect .text[PR],2
+; CHECK-NEXT: .csect .text[PR],5
; CHECK-LABEL: .foo:
; CHECK: .globl main[DS]
@@ -50,7 +50,7 @@ entry:
; 64BIT-NEXT: .vbyte 8, .main
; 64BIT-NEXT: .vbyte 8, TOC[TC0]
; 64BIT-NEXT: .vbyte 8, 0
-; CHECK-NEXT: .csect .text[PR],2
+; CHECK-NEXT: .csect .text[PR],5
; CHECK-LABEL: .main:
; CHECK: bl .foo
; CHECK: bl .extern_foo
@@ -66,7 +66,7 @@ entry:
; 64BIT-NEXT: .vbyte 8, .static_foo
; 64BIT-NEXT: .vbyte 8, TOC[TC0]
; 64BIT-NEXT: .vbyte 8, 0
-; CHECK-NEXT: .csect .text[PR],2
+; CHECK-NEXT: .csect .text[PR],5
; CHECK-LABEL: .static_foo:
; CHECK-NOT: .csect extern_foo
diff --git a/llvm/test/DebugInfo/XCOFF/empty.ll b/llvm/test/DebugInfo/XCOFF/empty.ll
index d70d1c4ecb8fe..d2f99b4b8189c 100644
--- a/llvm/test/DebugInfo/XCOFF/empty.ll
+++ b/llvm/test/DebugInfo/XCOFF/empty.ll
@@ -35,7 +35,7 @@ entry:
!11 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
!12 = !DILocation(line: 3, column: 3, scope: !8)
-; ASM32: .csect .text[PR],2
+; ASM32: .csect .text[PR],5
; ASM32-NEXT: .file "1.c"
; ASM32-NEXT: .globl main[DS] # -- Begin function main
; ASM32-NEXT: .globl .main
@@ -44,7 +44,7 @@ entry:
; ASM32-NEXT: .vbyte 4, .main # @main
; ASM32-NEXT: .vbyte 4, TOC[TC0]
; ASM32-NEXT: .vbyte 4, 0
-; ASM32-NEXT: .csect .text[PR],2
+; ASM32-NEXT: .csect .text[PR],5
; ASM32-NEXT: .main:
; ASM32-NEXT: L..func_begin0:
; ASM32-NEXT: # %bb.0: # %entry
@@ -236,7 +236,7 @@ entry:
; ASM32-NEXT: .byte 1
; ASM32-NEXT: L..debug_line_end0:
-; ASM64: .csect .text[PR],2
+; ASM64: .csect .text[PR],5
; ASM64-NEXT: .file "1.c"
; ASM64-NEXT: .globl main[DS] # -- Begin function main
; ASM64-NEXT: .globl .main
@@ -245,7 +245,7 @@ entry:
; ASM64-NEXT: .vbyte 8, .main # @main
; ASM64-NEXT: .vbyte 8, TOC[TC0]
; ASM64-NEXT: .vbyte 8, 0
-; ASM64-NEXT: .csect .text[PR],2
+; ASM64-NEXT: .csect .text[PR],5
; ASM64-NEXT: .main:
; ASM64-NEXT: L..func_begin0:
; ASM64-NEXT: # %bb.0: # %entry
diff --git a/llvm/test/DebugInfo/XCOFF/explicit-section.ll b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
index 2082fdd593129..b8e363094007d 100644
--- a/llvm/test/DebugInfo/XCOFF/explicit-section.ll
+++ b/llvm/test/DebugInfo/XCOFF/explicit-section.ll
@@ -42,7 +42,7 @@ entry:
!15 = !DILocation(line: 3, column: 10, scope: !14)
!16 = !DILocation(line: 3, column: 3, scope: !14)
-; CHECK: .csect .text[PR],2
+; CHECK: .csect .text[PR],5
; CHECK-NEXT: .file "2.c"
; CHECK-NEXT: .globl bar[DS] # -- Begin function bar
; CHECK-NEXT: .globl .bar
@@ -51,7 +51,7 @@ entry:
; CHECK-NEXT: .vbyte 4, .bar # @bar
; CHECK-NEXT: .vbyte 4, TOC[TC0]
; CHECK-NEXT: .vbyte 4, 0
-; CHECK-NEXT: .csect .text[PR],2
+; CHECK-NEXT: .csect .text[PR],5
; CHECK-NEXT: .bar:
; CHECK-NEXT: L..func_begin0:
; CHECK-NEXT: # %bb.0: # %entry
@@ -80,7 +80,7 @@ entry:
; CHECK-NEXT: .byte "bar" # Function Name
; CHECK-NEXT: L..func_end0:
; CHECK-NEXT: # -- End function
-; CHECK-NEXT: .csect explicit_main_sec[PR],2
+; CHECK-NEXT: .csect explicit_main_sec[PR],5
; CHECK-NEXT: .globl main[DS] # -- Begin function main
; CHECK-NEXT: .globl .main
; CHECK-NEXT: .align 2
@@ -88,7 +88,7 @@ entry:
; CHECK-NEXT: .vbyte 4, .main # @main
; CHECK-NEXT: .vbyte 4, TOC[TC0]
; CHECK-NEXT: .vbyte 4, 0
-; CHECK-NEXT: .csect explicit_main_sec[PR],2
+; CHECK-NEXT: .csect explicit_main_sec[PR],5
; CHECK-NEXT: .main:
; CHECK-NEXT: L..func_begin1:
; CHECK-NEXT: # %bb.0: # %entry
diff --git a/llvm/test/DebugInfo/XCOFF/function-sections.ll b/llvm/test/DebugInfo/XCOFF/function-sections.ll
index 661bf2f390491..f7347dc7bb44b 100644
--- a/llvm/test/DebugInfo/XCOFF/function-sections.ll
+++ b/llvm/test/DebugInfo/XCOFF/function-sections.ll
@@ -37,9 +37,9 @@ entry:
!13 = distinct !DISubprogram(name: "bar", scope: !1, file: !1, line: 6, type: !9, scopeLine: 7, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !2)
!14 = !DILocation(line: 8, column: 3, scope: !13)
-; CHECK: .csect .text[PR],2
+; CHECK: .csect .text[PR],5
; CHECK-NEXT: .file "1.c"
-; CHECK-NEXT: .csect .foo[PR],2
+; CHECK-NEXT: .csect .foo[PR],5
; CHECK-NEXT: .globl foo[DS] # -- Begin function foo
; CHECK-NEXT: .globl .foo[PR]
; CHECK-NEXT: .align 2
@@ -47,7 +47,7 @@ entry:
; CHECK-NEXT: .vbyte 4, .foo[PR] # @foo
; CHECK-NEXT: .vbyte 4, TOC[TC0]
; CHECK-NEXT: .vbyte 4, 0
-; CHECK-NEXT: .csect .foo[PR],2
+; CHECK-NEXT: .csect .foo[PR],5
; CHECK-NEXT: L..func_begin0:
; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: L..tmp0:
@@ -75,7 +75,7 @@ entry:
; CHECK-NEXT: .byte "foo" # Function Name
; CHECK-NEXT: L..func_end0:
; CHECK-NEXT: # -- End function
-; CHECK-NEXT: .csect .bar[PR],2
+; CHECK-NEXT: .csect .bar[PR],5
; CHECK-NEXT: .globl bar[DS] # -- Begin function bar
; CHECK-NEXT: .globl .bar[PR]
; CHECK-NEXT: .align 2
@@ -83,7 +83,7 @@ entry:
; CHECK-NEXT: .vbyte 4, .bar[PR] # @bar
; CHECK-NEXT: .vbyte 4, TOC[TC0]
; CHECK-NEXT: .vbyte 4, 0
-; CHECK-NEXT: .csect .bar[PR],2
+; CHECK-NEXT: .csect .bar[PR],5
; CHECK-NEXT: L..func_begin1:
; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: L..tmp3:
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