[PATCH] D124195: [AMDGPU] Separate out custom SGPR spills to VGPR during PEI

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:469
   unsigned NumVGPRSpillLanes = 0;
+  unsigned NumVGPRCustomSpillLanes = 0;
   SmallVector<Register, 2> SpillVGPRs;
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Isn't this count implied by SGPRToVGPRCustomSpills.size()? I'd like to avoid multiplying the number of unserialized fields


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124195/new/

https://reviews.llvm.org/D124195