[PATCH] D128703: [PowerPC] Improve getNormalLoadInput to reach more splat load opportunities

[Ting Wang via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG88b6d2279199: [PowerPC] Improve getNormalLoadInput to reach more splat load (authored by tingwang).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128703/new/

https://reviews.llvm.org/D128703

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/test/CodeGen/PowerPC/load-and-splat.ll


Index: llvm/test/CodeGen/PowerPC/load-and-splat.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/load-and-splat.ll
+++ llvm/test/CodeGen/PowerPC/load-and-splat.ll
@@ -1326,8 +1326,7 @@
 define <4 x i32> @test_splatW(<8 x i16>* %ptr) {
 ; P9-LABEL: test_splatW:
 ; P9:       # %bb.0: # %entry
-; P9-NEXT:    lxv vs0, 0(r3)
-; P9-NEXT:    xxspltw v2, vs0, 0
+; P9-NEXT:    lxvwsx v2, 0, r3
 ; P9-NEXT:    blr
 ;
 ; P8-LABEL: test_splatW:
@@ -1345,8 +1344,7 @@
 ;
 ; P9-AIX32-LABEL: test_splatW:
 ; P9-AIX32:       # %bb.0: # %entry
-; P9-AIX32-NEXT:    lxv vs0, 0(r3)
-; P9-AIX32-NEXT:    xxspltw v2, vs0, 0
+; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
 ; P9-AIX32-NEXT:    blr
 ;
 ; P8-AIX32-LABEL: test_splatW:
@@ -1370,38 +1368,32 @@
 define <4 x i32> @test_splatD(<8 x i16>* %ptr) {
 ; P9-LABEL: test_splatD:
 ; P9:       # %bb.0: # %entry
-; P9-NEXT:    lxv vs0, 0(r3)
-; P9-NEXT:    xxspltd v2, vs0, 0
+; P9-NEXT:    lxvdsx v2, 0, r3
 ; P9-NEXT:    blr
 ;
 ; P8-LABEL: test_splatD:
 ; P8:       # %bb.0: # %entry
-; P8-NEXT:    lxvd2x vs0, 0, r3
-; P8-NEXT:    xxspltd v2, vs0, 0
+; P8-NEXT:    lxvdsx v2, 0, r3
 ; P8-NEXT:    blr
 ;
 ; P7-LABEL: test_splatD:
 ; P7:       # %bb.0: # %entry
-; P7-NEXT:    lxvw4x vs0, 0, r3
-; P7-NEXT:    xxspltd v2, vs0, 0
+; P7-NEXT:    lxvdsx v2, 0, r3
 ; P7-NEXT:    blr
 ;
 ; P9-AIX32-LABEL: test_splatD:
 ; P9-AIX32:       # %bb.0: # %entry
-; P9-AIX32-NEXT:    lxv vs0, 0(r3)
-; P9-AIX32-NEXT:    xxmrghd v2, vs0, vs0
+; P9-AIX32-NEXT:    lxvdsx v2, 0, r3
 ; P9-AIX32-NEXT:    blr
 ;
 ; P8-AIX32-LABEL: test_splatD:
 ; P8-AIX32:       # %bb.0: # %entry
-; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
-; P8-AIX32-NEXT:    xxmrghd v2, vs0, vs0
+; P8-AIX32-NEXT:    lxvdsx v2, 0, r3
 ; P8-AIX32-NEXT:    blr
 ;
 ; P7-AIX32-LABEL: test_splatD:
 ; P7-AIX32:       # %bb.0: # %entry
-; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
-; P7-AIX32-NEXT:    xxmrghd v2, vs0, vs0
+; P7-AIX32-NEXT:    lxvdsx v2, 0, r3
 ; P7-AIX32-NEXT:    blr
 entry:
   %0 = load <8 x i16>, <8 x i16>* %ptr, align 16
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9073,7 +9073,7 @@
 
 static const SDValue *getNormalLoadInput(const SDValue &Op, bool &IsPermuted) {
   const SDValue *InputLoad = &Op;
-  if (InputLoad->getOpcode() == ISD::BITCAST)
+  while (InputLoad->getOpcode() == ISD::BITCAST)
     InputLoad = &InputLoad->getOperand(0);
   if (InputLoad->getOpcode() == ISD::SCALAR_TO_VECTOR ||
       InputLoad->getOpcode() == PPCISD::SCALAR_TO_VECTOR_PERMUTED) {


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