[llvm] ab72182 - [AArch64][SME] NFC: Extend tile_slice ComplexPattern to match default case.

[Sander de Smalen via llvm-commits]

Author: Sander de Smalen
Date: 2022-06-28T09:15:52+01:00
New Revision: ab7218277c801836eb700626bc4aebf47dd2095b

URL: https://github.com/llvm/llvm-project/commit/ab7218277c801836eb700626bc4aebf47dd2095b
DIFF: https://github.com/llvm/llvm-project/commit/ab7218277c801836eb700626bc4aebf47dd2095b.diff

LOG: [AArch64][SME] NFC: Extend tile_slice ComplexPattern to match default case.

A tile slice offset of '0' is the default and by moving this into
SelectSMETileSlice we can remove some redundant patterns.

Reviewed By: kmclaughlin

Differential Revision: https://reviews.llvm.org/D128506

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    llvm/lib/Target/AArch64/SMEInstrFormats.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 71a1416dafff4..82fe5772c99de 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -5256,9 +5256,12 @@ bool AArch64DAGToDAGISel::SelectAllActivePredicate(SDValue N) {
 }
 
 bool AArch64DAGToDAGISel::SelectSMETileSlice(SDValue N, unsigned Scale,
-                                             SDValue &Vector, SDValue &Offset) {
-  if (N.getOpcode() != ISD::ADD)
-    return false;
+                                             SDValue &Base, SDValue &Offset) {
+  if (N.getOpcode() != ISD::ADD) {
+    Base = N;
+    Offset = CurDAG->getTargetConstant(0, SDLoc(N), MVT::i64);
+    return true;
+  }
 
   // Process an ADD node.
   const SDValue LHS = N.getOperand(0);
@@ -5271,7 +5274,7 @@ bool AArch64DAGToDAGISel::SelectSMETileSlice(SDValue N, unsigned Scale,
     if (ImmOff < 0 || ImmOff > MaxSize)
       return false;
 
-    Vector = LHS;
+    Base = LHS;
     Offset = CurDAG->getTargetConstant(ImmOff, SDLoc(N), MVT::i64);
     return true;
   }

diff  --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td b/llvm/lib/Target/AArch64/SMEInstrFormats.td
index 2834792e49afc..9dd418a4ba9a5 100644
--- a/llvm/lib/Target/AArch64/SMEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td
@@ -251,25 +251,13 @@ multiclass sme_mem_ld_ss_patterns<Instruction Inst, SDPatternOperator Load,
                                   Operand tile_ty, Operand offset_ty,
                                   ComplexPattern addr,
                                   ComplexPattern tileslice> {
-  // base
+  // base, tileslice
   def : Pat<(Load PPR3bAny:$pg, GPR64sp:$base, tile_ty:$tile,
-                  MatrixIndexGPR32Op12_15:$idx),
-            (Inst tile_ty:$tile, $idx, 0, $pg, $base, XZR)>;
-  // reg + reg
-  let AddedComplexity = 1 in {
-    def : Pat<(Load PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset),
-                    tile_ty:$tile, MatrixIndexGPR32Op12_15:$idx),
-              (Inst tile_ty:$tile, $idx, 0, $pg, $base, $offset)>;
-  }
+                  (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))),
+            (Inst tile_ty:$tile, $idx, $imm, $pg, $base, XZR)>;
 
-  // base, tileslice
-  let AddedComplexity = 1 in {
-    def : Pat<(Load PPR3bAny:$pg, GPR64sp:$base, tile_ty:$tile,
-                    (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))),
-              (Inst tile_ty:$tile, $idx, $imm, $pg, $base, XZR)>;
-  }
   // reg + reg, tileslice
-  let AddedComplexity = 2 in {
+  let AddedComplexity = 1 in {
     def : Pat<(Load PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset),
                     tile_ty:$tile, (i32 (tileslice MatrixIndexGPR32Op12_15:$idx,
                                               offset_ty:$imm))),
@@ -410,24 +398,13 @@ multiclass sme_mem_st_ss_patterns<Instruction Inst, SDPatternOperator Store,
                                   ComplexPattern imm2tile,
                                   ComplexPattern addr,
                                   ComplexPattern tileslice> {
-  // base
-  def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile),
-                   MatrixIndexGPR32Op12_15:$idx),
-            (Inst $tile, $idx, 0, $pg, $base, XZR)>;
-  // reg + reg
-  let AddedComplexity = 1 in {
-    def : Pat<(Store PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset),
-                     (imm2tile untyped:$tile), MatrixIndexGPR32Op12_15:$idx),
-              (Inst $tile, $idx, 0, $pg, $base, $offset)>;
-  }
   // base, tileslice
-  let AddedComplexity = 1 in {
-    def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile),
-                     (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))),
-              (Inst $tile, $idx, $imm, $pg, $base, XZR)>;
-  }
+  def : Pat<(Store PPR3bAny:$pg, GPR64sp:$base, (imm2tile untyped:$tile),
+                   (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))),
+            (Inst $tile, $idx, $imm, $pg, $base, XZR)>;
+
   // reg + reg, tileslice
-  let AddedComplexity = 2 in {
+  let AddedComplexity = 1 in {
     def : Pat<(Store PPR3bAny:$pg, (addr GPR64sp:$base, GPR64:$offset),
                      (imm2tile untyped:$tile),
                      (i32 (tileslice MatrixIndexGPR32Op12_15:$idx, offset_ty:$imm))),