[PATCH] D128584: [X86][AMX] Split greedy RA for tile register

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added a comment.

In D128584#3614159 <https://reviews.llvm.org/D128584#3614159>, @LuoYuanke wrote:

> In previous code, the tile register and shape register are allocated in the same pass. The shape config is processed before "virtregrewriter". Though when filling shape, it is still virtual register, but the virtual register has been split or spillied.

OK, I got it, in the Tile Register Configure the virtual reg is "bind" with physic reg now.

It make sense to me now, I'll accept it if no other ops.


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