[PATCH] D128570: [ISel] Round down mask bit when merge undef(s) for DAG combine

[Xiang Zhang via Phabricator via llvm-commits]

xiangzhangllvm added inline comments.


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Comment at: llvm/test/CodeGen/X86/splat-value.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+
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If use -debug to check it, you will more easy to find the logic error:

In the DAG it will create "t45: v8i64 = X86ISD::VSHL t4, undef:v2i64" node which is totally no meaning. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128570/new/

https://reviews.llvm.org/D128570