[PATCH] D128188: [RISCV] Add a scavenge spill slot when use ADDI to compute scalable stack offset

[luxufan via Phabricator via llvm-commits]

StephenFan marked an inline comment as done.
StephenFan added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:177
       getFrameLowering(MF)->getFrameIndexReference(MF, FrameIndex, FrameReg);
-  bool IsRVVSpill = RISCV::isRVVSpill(MI, /*CheckFIs*/ false);
+  bool IsRVVSpill = RISCV::isRVVSpill(MI);
   if (!IsRVVSpill)
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craig.topper wrote:
> Is `IsRVVSpill` used anywhere other than the following if? If not can we call RICV::isRVVSpill as part of the `if` and remove the variable.
It is used on lines 262 and 272.


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  https://reviews.llvm.org/D128188/new/

https://reviews.llvm.org/D128188