[llvm] ea1b861 - [RISCV] Fix misleading formatting and remove a dead getNode call. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 27 18:54:58 PDT 2022
Author: Craig Topper
Date: 2022-06-27T18:49:57-07:00
New Revision: ea1b86127814aff54b2ab821db060865af920437
URL: https://github.com/llvm/llvm-project/commit/ea1b86127814aff54b2ab821db060865af920437
DIFF: https://github.com/llvm/llvm-project/commit/ea1b86127814aff54b2ab821db060865af920437.diff
LOG: [RISCV] Fix misleading formatting and remove a dead getNode call. NFC
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 0205805fbb7b..4fa3c7603400 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -7003,7 +7003,6 @@ void RISCVTargetLowering::ReplaceNodeResults(SDNode *N,
case ISD::ABS: {
assert(N->getValueType(0) == MVT::i32 && Subtarget.is64Bit() &&
"Unexpected custom legalisation");
- DAG.getNode(ISD::SIGN_EXTEND, DL, MVT::i64, N->getOperand(0));
// Expand abs to Y = (sraiw X, 31); subw(xor(X, Y), Y)
@@ -11974,7 +11973,7 @@ bool RISCVTargetLowering::decomposeMulByConstant(LLVMContext &Context, EVT VT,
APInt ImmS = Imm.ashr(Imm.countTrailingZeros());
if ((ImmS + 1).isPowerOf2() || (ImmS - 1).isPowerOf2() ||
(1 - ImmS).isPowerOf2())
- return true;
+ return true;
}
}
}
More information about the llvm-commits
mailing list