[PATCH] D124196: [AMDGPU][SILowerSGPRSpills] Spill SGPRs to virtual VGPRs
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 27 17:29:02 PDT 2022
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
LGTM. Might want to introduce an asm printer flag on the implicit_def to mark it's for SGPR spills in the comment
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Comment at: llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp:267
+ // finding the common dominator to get either the dominating spill or a block
+ // dominating all spills. Is there a better way to handle it?
+ SIMachineFunctionInfo *FuncInfo =
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Remove "Is there a better way to handle it?"
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Comment at: llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp:307
+ else if (DomMBB != PrevInsertPt->getParent())
+ I->second = &(*DomMBB->getFirstTerminator());
+ }
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Extra ()s
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D124196/new/
https://reviews.llvm.org/D124196
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