[PATCH] D128583: CodeGen: Remove AliasAnalysis from regalloc

[Matthias Braun via Phabricator via llvm-commits]

MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.

I always found it very unfortunate that we keep IR references around in MIR to do alias analysis queries. This appears to remove a lot of those users (all but the ones in the schedule graph construction?), so I highly welcome the change!

Do you think that there is a risk of target-specific ISel or optimiziation not setting the flags properly in this new scheme? Though even if there is risk, I'd rather push this forward this is too nice a cleanup to block it ;-)

Thanks, LGTM



================
Comment at: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp:1616-1633
+  ConstantInt *CopySize = nullptr;
+
   if (auto *MCI = dyn_cast<MemCpyInst>(&CI)) {
     DstAlign = MCI->getDestAlign().valueOrOne();
     SrcAlign = MCI->getSourceAlign().valueOrOne();
+    CopySize = dyn_cast<ConstantInt>(MCI->getArgOperand(2));
   } else if (auto *MCI = dyn_cast<MemCpyInlineInst>(&CI)) {
----------------
Nit: I like initializing things in every branch without a default, so you get warnings if you forget to set the value in one of the branches...


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128583/new/

https://reviews.llvm.org/D128583