[PATCH] D128188: [RISCV] Add a scavenge spill slot when use ADDI to compute scalable stack offset

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 27 09:32:21 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:968
+    for (const MachineInstr &MI : MBB) {
+      bool isRVVSpill = RISCV::isRVVSpill(MI);
+      for (auto &MO : MI.operands()) {
----------------
Variable names should be capitalized


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:972
+          continue;
+        bool isScalableVectorID = MF.getFrameInfo().getStackID(MO.getIndex()) ==
+                                  TargetStackID::ScalableVector;
----------------
Variable names should be capitalized


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128188/new/

https://reviews.llvm.org/D128188



More information about the llvm-commits mailing list