[PATCH] D128635: AMDGPU: Mark more instructions as rematerializable

[Matt Arsenault via Phabricator via llvm-commits]

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D106023 <https://reviews.llvm.org/D106023> excluded 16-bit instructions from rematerialization, with the
justification that we can't rematerialize instructions that preserve
the high bits (plus the instructions which do are a confusing mess
between different subtargets). This doesn't make sense to me as a
problem since cases where we would rely on the high bit behavior would
still need to be represented as a register value constraint with a
tied operand. It's not a hidden side effect and should still be
rematerializable.


https://reviews.llvm.org/D128635

Files:
  llvm/lib/Target/AMDGPU/VOP2Instructions.td
  llvm/test/CodeGen/AMDGPU/remat-vop.mir

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